ST7263BK4 STMicroelectronics, ST7263BK4 Datasheet - Page 121

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ST7263BK4

Manufacturer Part Number
ST7263BK4
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263BK4

4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection

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0
ST7263Bxx
I²C Status register 2 (SR2)
Reset value: 0000 0000 (00h)
7
0
[7:5] Reserved. Forced to 0 by hardware.
4 AF Acknowledge failure.
3 STOPF Stop detection (Slave mode).
0
This bit is set by hardware when no acknowledge is returned. An interrupt is
generated if ITE=1. It is cleared by software reading SR2 register or by hardware
when the interface is disabled (PE=0).
0: No acknowledge failure
1: Acknowledge failure
Note: While AF=1, the SCL line may be held low due to SB or BTF flags that are
This bit is set by hardware when a Stop condition is detected on the bus after an
acknowledge (if ACK=1). An interrupt is generated if ITE=1. It is cleared by
software reading SR2 register or by hardware when the interface is disabled
(PE=0).
The SCL line is not held low while STOPF=1.
0: No Stop condition detected
1: Stop condition detected
set at the same time. It is then necessary to release both lines by software.
0
Doc ID 7516 Rev 8
AF
Read only
STOPF
ARLO
On-chip peripherals
BERR
GCAL
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0

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