ST72264G1 STMicroelectronics, ST72264G1 Datasheet - Page 146
ST72264G1
Manufacturer Part Number
ST72264G1
Description
8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet
1.ST72262G2.pdf
(172 pages)
Specifications of ST72264G1
4 K Or 8 Kbytes Program Memory
ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt,Wait and Slow
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
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ST72260Gx, ST72262Gx, ST72264Gx
I/O PORT PIN CHARACTERISTICS (Cont’d)
13.8.2 Output Driving Current
T
Notes:
1. The I
(I/O ports and control pins) must not exceed I
2. The I
I
3. Not tested in production, based on characterization results.
146/172
IO
A
Symbol
V
V
V
V
V
V
OH
OH
(I/O ports and control pins) must not exceed I
OL
OL
= -40 to +85°C unless otherwise specified
OH
OL
1)3)
1)3)
2)3)
2)3)
1)
2)
IO
IO
current sunk must always respect the absolute maximum rating specified in
current sourced must always respect the absolute maximum rating specified in
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
Parameter
VSS
VDD
.
. True open drain I/O pins does not have V
I
I
I
I
I
I
I
I
I
I
I
I
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Conditions
=+5mA
=+2mA
=+20mA,
=+8mA
=-5mA,
=-2mA
=+2mA
=+8mA
=-2mA
=+2mA
=+8mA
=-2mA
T
A
≤85°C V
Section 13.2.2
Section 13.2.2
V
V
V
DD
DD
DD
DD
Min
-1.6
-0.8
-0.8
-0.9
OH
.
and the sum of I
Max
0.75
1.2
0.5
1.3
0.6
0.6
0.7
0.7
and the sum of
Unit
V
IO
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