ST72321BR9 STMicroelectronics, ST72321BR9 Datasheet - Page 89

• Manufacturer Part Number: ST72321BR9
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72321BR9

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

SERIAL PERIPHERAL INTERFACE (Cont’d)
10.5.3.1 Functional Description
A basic example of interconnections between a
single master and a single slave is illustrated in
Figure
The MOSI pins are connected together and the
MISO pins are connected together. In this way
data is transferred serially between master and
slave (most significant bit first).
Figure 55. Single Master/ Single Slave Application
– SS: Slave select:
This input signal acts as a ‘chip select’ to let
the SPI master communicate with slaves indi-
vidually and to avoid contention on the data
lines. Slave SS inputs can be driven by stand-
ard I/O ports on the master MCU.
55.
MSBit
8-BIT SHIFT REGISTER
GENERATOR
CLOCK
SPI
MASTER
LSBit
ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
SCK
MOSI
SS
MISO
+5V
The communication is always initiated by the mas-
ter. When the master device transmits data to a
slave device via MOSI pin, the slave device re-
sponds by sending data to the master device via
the MISO pin. This implies full duplex communica-
tion with both data out and data in synchronized
with the same clock signal (which is provided by
the master device via the SCK pin).
To use a single data line, the MISO and MOSI pins
must be connected at each node ( in this case only
simplex communication is possible).
Four possible data/clock timing relationships may
be chosen (see
must be programmed with the same timing mode.
MISO
MOSI
SCK
SS
Figure
8-BIT SHIFT REGISTER
MSBit
Not used if SS is managed
by software
58) but master and slave
SLAVE
LSBit
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