ST72361AR7 STMicroelectronics, ST72361AR7 Datasheet - Page 181
ST72361AR7
Manufacturer Part Number
ST72361AR7
Description
8-BIT MCU WITH FLASH OR ROM, 10-BIT ADC, 5 TIMERS, SPI, 2x LINSCI™
Manufacturer
STMicroelectronics
Datasheet
1.ST72361AR7.pdf
(225 pages)
Specifications of ST72361AR7
Hdflash Endurance
100 cycles, data retention 40 years at 85°C
5 Power Saving Modes
Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow
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12.3.2 Operating Conditions with Low Voltage Detector (LVD)
Subject to general operating conditions for T
Notes:
1. Data based on characterization results, not tested in production.
12.3.3 Auxiliary Voltage Detector (AVD) Thresholds
Subject to general operating conditions for T
1. Data based on characterization results, not tested in production.
Figure 98. LVD Startup Behavior
Note: When the LVD is enabled, the MCU reaches its authorized operating voltage from a reset state.
However, in some devices, the reset signal may be undefined until V
quence, the I/Os may toggle when V
Because Flash write access is impossible below this voltage, the Flash memory contents will not be cor-
rupted.
V
V
V
Vt
t
V
V
V
ΔV
g(VDD)
Symbol
Symbol
IT+(LVD)
IT-(LVD)
hys(LVD)
IT+(AVD)
IT-(AVD)
hys(AVD)
POR
IT-
Reset state
not defined
in this area
Reset release threshold (V
Reset generation threshold (V
LVD voltage threshold hysteresis
V
V
LVD
1⇒0 AVDF flag toggle threshold
(V
0⇒1 AVDF flag toggle threshold
(V
AVD voltage threshold hysteresis
Voltage drop between AVD flag set
and LVD reset activated
DD
DD
DD
DD
1)
glitches filtered (not detected) by
rise time rate
rise)
fall)
2V
5V
V
Parameter
Parameter
IT+
1)
DD
DD
DD
rise)
is below this voltage.
1)
fall)
A
A
V
V
V
Measured at V
.
.
IT+(AVD)
IT-(AVD)
IT+(LVD)
-V
Conditions
-V
Conditions
-V
IT-(LVD)
IT-(AVD)
IT-(LVD)
IT-(LVD)
DD
is approximately 2V. As a conse-
4.0
4.4
Min
150
Min
3.8
4.2
6
1)
1)
t
Typ
Typ
200
250
450
4.2
4.0
4.6
4.4
LVD RESET
4.25
4.65
Max
Max
250
100
4.5
4.9
40
1)
1)
ST72361
181/225
ms/V
Unit
μs/V
Unit
mV
mV
ns
V
V
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