ST72324J6 STMicroelectronics, ST72324J6 Datasheet - Page 142

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ST72324J6

Manufacturer Part Number
ST72324J6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72324J6

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
16-bit Timer A With
1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
ST72324Jx ST72324Kx
12.13 10-BIT ADC CHARACTERISTICS
Subject to general operating conditions for V
Notes:
1. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10kΩ). Data
based on characterization results, not tested in production.
2.For Flash devices: injecting negative current on any of the analog input pins significantly reduces the accuracy of any
conversion being performed on any analog input. Analog pins of ST72F324 devices can be protected against negative
injection by adding a Schottky diode (pin to ground). Injecting negative current on digital input pins degrades ADC accu-
racy especially if performed on a pin close to the analog input pins. Any positive injection current within the limits specified
for I
142/164
1
Symbol
V
C
R
C
f
V
t
t
f
AREF
ADC
ADC
ADC
INJ(PIN)
I
AIN
ADC
lkg
AIN
AIN
AIN
and ΣI
ADC clock frequency
Analog reference voltage
Conversion voltage range
Positive input leakage current for analog
input
External input impedance
External capacitor on analog input
Variation freq. of analog input signal
Internal sample and hold capacitor
Conversion time (Sample+Hold)
f
- No of sample capacitor loading cycles
- No. of Hold conversion cycles
CPU
=8MHz, SPEED=0 f
2)
INJ(PIN)
in
Parameter
Section 12.9
ADC
1)
=2MHz
does not affect the ADC accuracy.
DD
0.7*V
-40°C≤T
+85°C≤T
, f
CPU
DD
Conditions
, and T
A
≤V
A
≤+85°C
≤+125°C
AREF
A
≤V
unless otherwise specified.
DD
V
Min
0.4
3.8
SSA
Typ
12
7.5
11
4
Figure 83
84
Figure
V
±250
Max
see
and
V
AREF
±1
2)3)4)
2
DD
1/f
Unit
MHz
nA
µA
kΩ
pF
Hz
pF
µs
V
ADC

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