STM8TL53G4 STMicroelectronics, STM8TL53G4 Datasheet - Page 10

• Manufacturer Part Number: STM8TL53G4
• Description: 8-bit, ultra-low-power, touch-sensing MCUs with 16-Kbyte Flash and proximity detection
• Manufacturer: STMicroelectronics

Specifications of STM8TL53G4

• Operating Power Supply: 1.65 V to 3.6 V
• Temperature Range: –40 °C to 85 °C
• 4 Low Power Modes: Wait, Active-halt with AWU (1 μA), Active-halt with ProxSense™ (10 μA with scan every 200 ms),Halt (0.4 μA)
• Dynamic Power Consumption: 150 μA/MHz
• Fast Wakeup From Halt Mode: 4.7 μs
• Ultralow Leakage Per I/o: 50 nA

Product overview
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Memory
The STM8TL53C4/G4 devices have the following main features:
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Low power modes
To minimize power consumption, the product features three MCU low power modes:
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The ProxSense peripheral can return to low power mode between each conversion.
The ProxSense acquisition can be operated in Run, Wait and Active-halt modes.
Voltage regulators
The STM8TL53C4/G4 devices embed an internal voltage regulator for generating the 1.8 V
power supply for the core and peripherals and a second internal voltage regulator providing
a stable power supply (around 1.45V) for the ProxSense peripheral.
Dual-mode voltage regulator
This regulator has two different modes: main voltage regulator mode (MVR) and low power
voltage regulator mode (LPVR). When in Active-halt mode, the regulator remains in MVR if
ProxSense is active. When entering Halt or Active-halt modes, the system automatically
switches from the MVR to the LPVR in order to reduce current consumption unless
ProxSense is enabled.
ProxSense voltage regulator
This regulator provides a very stable voltage to power the ProxSense peripheral including
ProxSense pins in order to be independent of any power supply variations. This regulator is
switched on while the ProxSense peripheral is enabled (bit PXSEN = 1) and bit
LOW_POWER is set to ‘0’ in register PXS_CR1. Otherwise, when LOW_POWER is set to
‘1’, this regulator is only enabled during conversions (while CIPF = 1 and SYNCPF = 0).
4 Kbytes of RAM
The EEPROM is divided into two memory arrays (see the STM8TL53xx reference
manual (RM0312) for details on the memory mapping):
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Wait mode: CPU clock stopped, selected peripherals at full clock speed.
Active-halt mode:
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Halt mode: CPU and peripheral clocks are stopped, the device remains powered on.
Wakeup is triggered by an external interrupt.
16 Kbytes of low-density embedded Flash program including up to 2 Kbytes of
data EEPROM. Data EEPROM and Flash program areas can be write protected
independently by using the memory access security mechanism (MASS).
64 option bytes (one block) of which 5 bytes are already used for the device.
Error correction code is implemented on the EEPROM.
When wakeup time is programmed in the AWU unit, the CPU and peripheral
clocks are stopped. The RAM content is preserved.
When a ProxSense acquisition is ongoing, the wakeup is on ProxSense interrupts;
the CPU and the other peripheral clocks are stopped.
Doc ID 022344 Rev 1
STM8TL53xx