STM8L151R6 STMicroelectronics, STM8L151R6 Datasheet - Page 61
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STM8L151R6
Manufacturer Part Number
STM8L151R6
Description
STM8L-Ultra Low Power-8 bits Micrcontrollers
Manufacturer
STMicroelectronics
Datasheet
1.STM8L151R6.pdf
(126 pages)
Specifications of STM8L151R6
Operating Power Supply
1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
Temp. Range
−40 to 85, 105 or 125 °C
5 Low Power Modes
Wait, Low power run (5.9 μA), Low power wait (3 μA), Active-halt with full RTC (1.4 μA), Halt (400 nA)
Dynamic Power Consumption
200 μA/MHz+330 μA
Ultra Low Leakage Per I/0
50 nA
Max Freq
16 MHz, 16 CISC MIPS peak
Lcd
8x40 or 4x44 w/ step-up converter
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8L151R6T6
Manufacturer:
STM
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479
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Part Number:
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Manufacturer:
STMicroelectronics
Quantity:
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Part Number:
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STM8L15xx8, STM8L15xR6
Table 13.
byte no.
Option
OPT0
OPT1
OPT2
OPT3
OPT4
ROP[7:0] Memory readout protection (ROP)
UBC[7:0] Size of the user boot code area
PCODESIZE[7:0] Size of the proprietary code area
IWDG_HW: Independent watchdog
IWDG_HALT: Independent watchdog off in Halt/Active-halt
WWDG_HW: Window watchdog
WWDG_HALT: Window window watchdog reset on Halt/Active-halt
HSECNT: Number of HSE oscillator stabilization clock cycles
LSECNT: Number of LSE oscillator stabilization clock cycles
Option byte description
0xAA: Disable readout protection (write access via SWIM protocol)
Refer to Readout protection section in the STM8L reference manual (RM0031).
UBC[7:0] Size of the user boot code area
0x00: No UBC
0x01: Page 0 reserved for the UBC and write protected.
...
0xFF: Page 0 to 254 reserved for the UBC and write-protected.
Refer to User boot code section in the STM8L reference manual (RM0031).
0x00: No proprietary code area
0x01: Page 0 reserved for the proprietary code and read/write protected.
...
0xFF: Page 0 to 254 reserved for the proprietary code and read/write protected.
Refer to Proprietary code area (PCODE) section in the STM8L reference manual
(RM0031) for more details.
0: Independent watchdog activated by software
1: Independent watchdog activated by hardware
0: Independent watchdog continues running in Halt/Active-halt mode
1: Independent watchdog stopped in Halt/Active-halt mode
0: Window watchdog activated by software
1: Window watchdog activated by hardware
0: Window watchdog stopped in Halt mode
1: Window watchdog generates a reset when MCU enters Halt mode
0x00 - 1 clock cycle
0x01 - 16 clock cycles
0x10 - 512 clock cycles
0x11 - 4096 clock cycles
0x00 - 1 clock cycle
0x01 - 16 clock cycles
0x10 - 512 clock cycles
0x11 - 4096 clock cycles
Doc ID 17943 Rev 4
Option description
Option bytes
61/126