STM32F215VE STMicroelectronics, STM32F215VE Datasheet - Page 119

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STM32F215VE

Manufacturer Part Number
STM32F215VE
Description
High-performance ARM Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, HW crypto
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F215VE

10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII

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Manufacturer:
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0
STM32F215xx, STM32F217xx
Table 64.
1. Guaranteed by design, not tested in production.
2. Guaranteed by characterization, not tested in production.
INL
Offset
Gain
error
t
THD
Update
rate
t
PSRR+
SETTLING
WAKEUP
Symbol
(2)
(1)
(2)
(2)
(2)
(1)
(2)
(2)
Integral non linearity
(difference between
measured value at Code i
and the value at Code i on a
line drawn between Code 0
and last Code 1023)
Offset error
(difference between
measured value at Code
(0x800) and the ideal value =
V
Gain error
Settling time (full scale: for a
10-bit input code transition
between the lowest and the
highest input codes when
DAC_OUT reaches final
value ±4LSB
Total Harmonic Distortion
Buffer ON
Max frequency for a correct
DAC_OUT change when
small variation in the input
code (from code i to i+1LSB)
Wakeup time from off state
(Setting the ENx bit in the
DAC Control register)
Power supply rejection ratio
(to V
measurement)
DAC characteristics (continued)
REF+
DDA
/2)
) (static DC
Parameter
Min
-
-
-
-
-
-
-
-
-
-
-
Doc ID 17050 Rev 6
Typ
–67
6.5
3
-
-
-
-
-
-
-
-
Max
±0.5
±10
±12
–40
±1
±4
±3
10
6
1
-
MS/s
Unit
LSB
LSB
LSB
LSB
mV
dB
dB
µs
µs
%
Given for the DAC in 10-bit
configuration.
Given for the DAC in 12-bit
configuration.
Given for the DAC in 12-bit
configuration
Given for the DAC in 10-bit at
V
Given for the DAC in 12-bit at
V
Given for the DAC in 12-bit
configuration
C
R
C
R
C
R
C
input code between lowest and
highest possible ones.
No R
REF+
REF+
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
Electrical characteristics
= 3.6 V
= 3.6 V
≤ 50 pF,
≥ 5 kΩ
≤ 50 pF,
≥ 5 kΩ
≤ 50 pF,
≥ 5 kΩ
≤ 50 pF, R
, C
Comments
LOAD
LOAD
= 50 pF
≥ 5 kΩ
119/168

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