EP4CE6F17C6N Altera Corporation, EP4CE6F17C6N Datasheet - Page 40
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EP4CE6F17C6N
Manufacturer Part Number
EP4CE6F17C6N
Description
IC CYCLONE IV FPGA 6K 256FBGA
Manufacturer
Altera Corporation
Series
CYCLONE® IV Er
Datasheet
1.EP4CE15F23C7N.pdf
(44 pages)
Specifications of EP4CE6F17C6N
Number Of Logic Elements/cells
6272
Number Of Labs/clbs
392
Total Ram Bits
276480
Number Of I /o
179
Number Of Gates
-
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-BGA
Lead Free Status
Lead free
Rohs Status
RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4CE6F17C6N
Manufacturer:
ALTERA
Quantity:
319
1–40
Table 1–46. Glossary (Part 3 of 5)
Cyclone IV Device Handbook,
Volume 3
Letter
R
S
R
Receiver Input
Waveform
Receiver input
skew margin
(RSKM)
Single-ended
voltage-
referenced I/O
Standard
SW (Sampling
Window)
L
Term
Receiver differential input discrete resistor (external to Cyclone IV devices).
Receiver input waveform for LVDS and LVPECL differential standards:
High-speed I/O block: The total margin left after accounting for the sampling window and TCCS.
RSKM = (TUI – SW – TCCS) / 2.
The JEDEC standard for SSTl and HSTL I/O standards defines both the AC and DC input signal
values. The AC values indicate the voltage levels at which the receiver must meet its timing
specifications. The DC values indicate the voltage levels at which the final logic state of the
receiver is unambiguously defined. After the receiver input crosses the AC value, the receiver
changes to the new logic state. The new logic state is then maintained as long as the input stays
beyond the DC threshold. This approach is intended to provide predictable receiver timing in the
presence of input waveform ringing.
High-speed I/O block: The period of time during which the data must be valid to capture it
correctly. The setup and hold times determine the ideal strobe position in the sampling window.
Single-Ended Waveform
Differential Waveform (Mathematical Function of Positive & Negative Channel)
V
V
OH
OL
V
CM
V
ID
V
ID
Definitions
V
REF
Chapter 1: Cyclone IV Device Datasheet
V
ID
November 2011 Altera Corporation
Positive Channel (p) = V
Negative Channel (n) = V
Ground
0 V
p - n
V
V
IH(DC)
IL(DC)
V
V
IH ( AC )
IL(AC )
V
CCIO
V
IH
IL
Glossary
SS