PSMN3R2-30YLC NXP Semiconductors, PSMN3R2-30YLC Datasheet - Page 9

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN3R2-30YLC

Manufacturer Part Number
PSMN3R2-30YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN3R2-30YLC
Product data sheet
Fig 12. Drain-source on-state resistance as a function
Fig 14. Gate charge waveform definitions
(mΩ)
R
DS on
16
12
8
4
0
of drain current; typical values
0
V
V
V
V
GS(pl)
DS
GS(th)
GS
20
Q
2.6
GS1
I
Q
D
GS
40
Q
GS2
Q
G(tot)
2.8
60
Q
GD
V
N-channel 30 V 3.5mΩ logic level MOSFET in LFPAK using NextPower
GS
80
All information provided in this document is subject to legal disclaimers.
003a a f 784
003aaa508
(V) =
I
D
(A)
3.0
3.5
4.5
10
100
Rev. 01 — 2 May 2011
Fig 13. Normalized drain-source on-state resistance
Fig 15. Gate-source voltage as a function of gate
V
(V)
GS
a
1.5
0.5
10
2
1
0
8
6
4
2
0
-60
factor as a function of junction temperature
charge; typical values
0
10
0
PSMN3R2-30YLC
V
60
DS
20
15V
= 6V
V
GS
24V
=10V
120
30
© NXP B.V. 2011. All rights reserved.
003a a f 785
003a a f 791
Q
T
G
j
(°C)
(nC)
4.5V
180
40
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