PSMN3R2-25YLC NXP Semiconductors, PSMN3R2-25YLC Datasheet - Page 10

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN3R2-25YLC

Manufacturer Part Number
PSMN3R2-25YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN3R2-25YLC
Product data sheet
Fig 16. Input, output and reverse transfer capacitance
Fig 18. Reverse recovery timing definition
(pF)
10
C
10
10
4
3
2
10
as a function of drain-source voltage; typical
values
-1
1
10
(A)
I
D
0
N-channel 25 V 3.4 mΩ logic level MOSFET in LFPAK using NextPower
V
C
C
C
All information provided in this document is subject to legal disclaimers.
DS
003a a f 850
is s
os s
rs s
(V)
10
2
Rev. 01 — 2 May 2011
t
a
Fig 17. Source current as a function of source-drain
t
rr
(A)
I
100
S
80
60
40
20
t
b
0
voltage; typical values
0
I
RM
003a a f 444
0.25 I
t (s )
R M
0.3
T
PSMN3R2-25YLC
j
= 150 °C
0.6
0.9
T
© NXP B.V. 2011. All rights reserved.
j
= 25 °C
003a a f 853
V
S D
(V)
1.2
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