PSMN2R0-30YL NXP Semiconductors, PSMN2R0-30YL Datasheet - Page 4

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology

PSMN2R0-30YL

Manufacturer Part Number
PSMN2R0-30YL
Description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
5. Thermal characteristics
Table 5.
PSMN2R0-30YL
Product data sheet
Symbol
R
Fig 3.
Fig 4.
th(j-mb)
Z
(K/W)
10
10
10
th(j-mb)
10
10
(A)
10
I
10
-1
-2
-3
D
1
3
2
1
10
10
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
Transient thermal impedance from junction to mounting base as a function of pulse duration
-1
-6
δ = 0.5
0.05
0.2
0.1
Thermal characteristics
0.02
single shot
Parameter
thermal resistance from
junction to mounting base
10
-5
Limit R
(1)
DSon
= V
DS
All information provided in this document is subject to legal disclaimers.
10
/ I
1
D
-4
Conditions
see
Rev. 4 — 10 March 2011
Figure 4
10
-3
N-channel 30 V 2 mΩ logic level MOSFET in LFPAK
DC
10
10
-2
PSMN2R0-30YL
Min
-
V
DS
10
P
(V)
-1
t
p
Typ
0.4
100 μs
10 ms
1 ms
100 ms
10 μs
T
t
p
© NXP B.V. 2011. All rights reserved.
(s)
003aac529
003aac481
δ =
Max
1.28
t
T
p
t
10
1
2
Unit
K/W
4 of 14

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