LPC1774FBD208 NXP Semiconductors, LPC1774FBD208 Datasheet - Page 36

The LPC1774 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz

LPC1774FBD208

Manufacturer Part Number
LPC1774FBD208
Description
The LPC1774 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz
Manufacturer
NXP Semiconductors
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1774FBD208
Manufacturer:
INFINEON
Quantity:
25
Part Number:
LPC1774FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 4.
Not all functions are available on all parts. See
LPC178X_7X
Objective data sheet
Ball
Row A
1
5
9
13
17
Row B
1
5
9
13
17
Row C
1
5
9
13
17
Row D
1
5
9
13
17
Row E
1
5
9
13
17
Row F
1
5
9
13
17
Row G
1
5
Symbol
P3[27]
P1[4]
P1[17]
P3[20]
P1[5]
P3[2]
P1[1]
P4[25]
V
P2[0]
P3[13]
P3[9]
V
P0[7]
V
JTAG_TRST
P3[11]
P1[2]
P0[6]
P2[4]
P0[26]
-
-
-
P2[6]
P0[25]
-
-
-
P3[16]
P3[5]
-
DD(3V3)
DD(3V3)
DD(3V3
Pin allocation table TFBGA208
)
Ball Symbol
2
6
10
14
2
6
10
14
2
6
10
14
2
6
10
14
2
6
10
14
2
6
10
14
2
6
V
P1[9]
P1[3]
P1[11]
-
P3[10]
V
P4[29]
P3[19]
-
JTAG_TDI
P3[22]
P3[21]
P0[9]
-
P3[28]
P0[3]
P1[16]
P1[7]
-
JTAG_TCK
(SWDCLK)
-
-
P2[1]
-
P3[4]
-
-
P4[11]
-
P0[24]
-
SS
SS
All information provided in this document is subject to legal disclaimers.
Table 2
Rev. 3 — 27 December 2011
and
Table 7
Ball
3
7
11
15
3
7
11
15
3
7
11
15
3
7
11
15
3
7
11
15
3
7
11
15
3
7
(EMC pins).
Symbol
P1[0]
P1[14]
P4[15]
P0[8]
-
P3[1]
P4[30]
P1[6]
P4[14]
-
P5[4]
P1[8]
P4[28]
P3[18]
-
JTAG_TDO (SWO)
V
V
P2[2]
-
JTAG_TMS (SWDIO)
-
-
V
-
P3[29]
-
-
P3[17]
-
V
-
DD(3V3)
DD(REG)(3V3)
SS
DD(3V3)
32-bit ARM Cortex-M3 microcontroller
Ball
4
8
12
16
4
8
12
16
4
8
12
16
4
8
12
16
4
8
12
16
4
8
12
16
4
8
LPC178x/7x
Symbol
P4[31]
P1[15]
V
P1[12]
-
P3[0]
P4[24]
P0[4]
P4[13]
-
P0[2]
P1[10]
P0[5]
P4[12]
-
P3[12]
P3[8]
VSSREG
P1[13]
-
P3[3]
-
-
P2[3]
-
P5[0]
-
-
P2[5]
-
V
-
SS
DDA
© NXP B.V. 2011. All rights reserved.
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