LPC11U24FET48 NXP Semiconductors, LPC11U24FET48 Datasheet - Page 28
![The LPC11U24FET48 is a ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/](/photos/41/52/415293/sot1155-2_3d_sml.gif)
LPC11U24FET48
Manufacturer Part Number
LPC11U24FET48
Description
The LPC11U24FET48 is a ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/
Manufacturer
NXP Semiconductors
Datasheet
1.LPC11U23FBD48.pdf
(70 pages)
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NXP Semiconductors
LPC11U2X
Product data sheet
7.18 Emulation and debugging
Debug functions are integrated into the ARM Cortex-M0. Serial wire debug functions are
supported in addition to a standard JTAG boundary scan. The ARM Cortex-M0 is
configured to support up to four breakpoints and two watch points.
The RESET pin selects between the JTAG boundary scan (RESET = LOW) and the ARM
SWD debug (RESET = HIGH). The ARM SWD debug port is disabled while the
LPC11U2x is in reset.
To perform boundary scan testing, follow these steps:
Remark: The JTAG interface cannot be used for debug purposes.
1. Erase any user code residing in flash.
2. Power up the part with the RESET pin pulled HIGH externally.
3. Wait for at least 250 s.
4. Pull the RESET pin LOW externally.
5. Perform boundary scan operations.
6. Once the boundary scan operations are completed, assert the TRST pin to enable the
SWD debug mode, and release the RESET pin (pull HIGH).
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 January 2012
32-bit ARM Cortex-M0 microcontroller
LPC11U2x
© NXP B.V. 2012. All rights reserved.
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