TFA9881 NXP Semiconductors, TFA9881 Datasheet

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TFA9881

Manufacturer Part Number
TFA9881
Description
The TFA9881 is a mono, filter-free class-D audio amplifier in a 9-bump WLCSP (WaferLevel Chip-Size Package) with a 400 μm pitch
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features and benefits
The TFA9881 is a mono, filter-free class-D audio amplifier in a 9-bump WLCSP (Wafer
Level Chip-Size Package) with a 400 μm pitch.
The digital input interface is an over-sampled Pulse Density Modulated (PDM) bit stream.
The TFA9881 receives audio and control settings via this interface. Dedicated silence
patterns are used to configure the control settings of the device, such as mute, gain, Pulse
Width Modulated (PWM) output slope, clip control and bandwidth extension (this control
mechanism is not required if the default settings are used). The Power-down to Operating
mode transition is triggered when a clock signal is detected.
The device features low RF susceptibility because it has a digital input interface that is
insensitive to clock jitter. The second order closed loop architecture used in the TFA9881
provides excellent audio performance and high supply voltage ripple rejection.
TFA9881
3.4 W PDM input class-D audio amplifier
Rev. 2 — 1 April 2011
Small outline WLCSP9 package: 1.3 × 1.3 × 0.6 mm
Wide supply voltage range (fully operational from 2.5 V to 5.5 V)
High efficiency (90 %, 4 Ω/20 μH load) and low power dissipation
Quiescent power:
Output power:
Output noise voltage: 24 μV (A-weighted)
Signal-to-noise ratio: 103 dB (V
Fully short-circuit proof across load and to supply lines
Current limiting to avoid audio holes
Thermally protected
Undervoltage and overvoltage protection
High-pass filter for DC blocking
Invalid data protection
Simple two-wire interface for audio and control settings
Left/right selection
Three gain settings: −3 dB, 0 dB and +3 dB
PWM output slope setting for EMI reduction
6.5 mW (V
7.8 mW (V
1.4 W into 4 Ω at 3.6 V supply (THD = 1 %)
2.7 W into 4 Ω at 5.0 V supply (THD = 1 %)
3.4 W into 4 Ω at 5.0 V supply (THD = 10 %)
DDD
DDD
= 1.8 V, V
= 1.8 V, V
DDP
DDP
DDP
= 3.6 V, 4 Ω/20 μH load, f
= 3.6 V, 4 Ω/20 μH load, f
= 5 V, A-weighted)
clk
clk
= 2.048 MHz)
= 6.144 MHz)
Product data sheet

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TFA9881 Summary of contents

Page 1

... The device features low RF susceptibility because it has a digital input interface that is insensitive to clock jitter. The second order closed loop architecture used in the TFA9881 provides excellent audio performance and high supply voltage ripple rejection. 2. Features and benefits Small outline WLCSP9 package: 1.3 × ...

Page 2

... W PDM input class-D audio amplifier = 3 1 DDP DDD L Min Typ 2.5 - DDP 1.65 1.8 DDD - 1.5 - 1.1 - 0.1 - 1. 100 100 100 TFA9881 Ω μ [1] [ Max Unit 5.5 V 1.95 V 1.7 mA 1.2 mA μA 1 1.5 mA 1.4 mA μ © NXP B.V. 2011. All rights reserved ...

Page 3

... All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 3.4 W PDM input class-D audio amplifier TEST V DDP C2 B2 TFA9881 HP PWM H-BRIDGE PROTECTION CIRCUITS: OTP OVP UVP OCP B3 GND TFA9881 Version TFA9881UK C3 OUTA A3 OUTB 010aaa698 © NXP B.V. 2011. All rights reserved ...

Page 4

... C2 I test pin (must be connected non-inverting output All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier TFA9881 bump index area 010aaa699 Transparent top view Bump configuration for WLCSP9 (top view) ...

Page 5

... Operating mode if a byte other than 0xAC is received. Mute mode is activated when the mute silence pattern (at least 32 consecutive 0x66 bytes) is detected on the DATA input. The TFA9881 will switch to Mute mode after byte 32 and will remain in Mute mode until a byte other than 0x66 is received. ...

Page 6

... Fig 5. Table 5. LRSEL pin state LOW HIGH 8.3 Power up/down sequence The TFA9881 power-up/power-down sequence is shown in supplies V switches to Operating mode. The TFA9881 should be switched to Power-down mode before the power supplies are disconnected or turned off. V DDP , V DDD 128·f or 64·f clock signal ...

Page 7

... Control settings Control settings are not needed if the default values are adequate. 8.4.1 Silence pattern recognition The TFA9881 can detect control settings on the PDM input by means of silence pattern recognition. A silence pattern has the following properties: • All audio bytes have the same value • ...

Page 8

... A silence pattern containing this byte will be recognized once the TFA9881 has powered up. Table 8. Bytes .................... 33 ................................. 127, 128 129 8.4.2 Clip control TFA9881 clip control is off by default. Clip control can be turned on via silence pattern 0xD2 (see is at maximum with clip control off. 8.4.3 Gain selection ...

Page 9

... Dynamic Power Stage Activation (DPSA) The TFA9881 uses DPSA to regulate current consumption in line with the level of the incoming audio stream. This function switches off power stage sections that are not needed, reducing current consumption. Each of the TFA9881 H-bridge power stages is divided into eight sections. The number of power stage sections activated depends on the level of the incoming audio stream ...

Page 10

... Mute Mute mode is activated when the mute silence pattern (at least 32 consecutive 0x66 bytes) is applied on the DATA input. The TFA9881 remains in Mute mode as long as the 0x66 pattern is repeated. It will return to Operating mode when a pattern other than 0x66 is received. Transitions to and from Mute mode occur as soon as the relevant pattern is recognized by the TFA9881 (hard mute and hard unmute) ...

Page 11

... Remark: The maximum PDM input modulation depth should be limited to avoid false IDP triggering. 8.6.2 OverTemperature Protection (OTP) OTP prevents heat damage to the TFA9881 triggered when the junction temperature exceeds 130 °C. When this happens, the output stages are set floating. OTP is cleared automatically via an internal timer (100 ms with f stages will start to operate normally again ...

Page 12

... MHz. clk Note that a supply voltage > 5.5 V may damage the TFA9881. 8.6.4 OverCurrent Protection (OCP) OCP will detect a short circuit across the load or between one of the amplifier outputs and one of the supply lines. If the output current exceeds the overcurrent protection threshold ...

Page 13

... Equivalent circuit All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier ESD 010aaa714 ESD 010aaa715 ESD 010aaa716 A3, C3 010aaa717 © NXP B.V. 2011. All rights reserved ...

Page 14

... T ambient temperature amb V voltage on pin electrostatic discharge voltage ESD [1] Measurements taken on the TFA9881 in a HVSON10 package (engineering samples) due to handling restrictions with WLCSP9. 11. Thermal characteristics Table 15. Thermal characteristics Symbol Parameter R thermal resistance from junction to ambient th(j-a) Ψ thermal characterization parameter from ...

Page 15

... MHz clk bandwidth extension on Power-down mode CLK = 0 V, DATA = 0 V DPSA off absolute value All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier Ω μ [1] [ kHz; f ...

Page 16

... W PDM input class-D audio amplifier Ω μ [1] [ kHz Min - - = 8 Ω μ Ω μ 217 3 3.6 V 3 [2] - [2] - [2] - TFA9881 = 6.144 MHz; clk Typ Max Unit 0.02 0.1 % μ 103 - 2 ...

Page 17

... HIGH after clock LOW after clock HIGH after clock LOW t su(CLKH) t h(CLKH) PDM timing All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier Ω μ [1] [ kHz; f ...

Page 18

... Standby and Operating modes. 13.1.2 Emissions Since the TFA9881 is a class-D amplifier with digitally switched outputs in a BTL configuration, it can potentially generate emissions due to the steep edges on the amplifier outputs. External components can be used to suppress these emissions. ...

Page 19

... All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 3.4 W PDM input class-D audio amplifier battery B2 OUTA C3 OUTB A3 CVDDP 4.7 μF battery B2 OUTA C3 OUTB A3 CVDDP 4.7 μF TFA9881 left speaker 4 Ω Ω right speaker 4 Ω Ω 010aaa712 © NXP B.V. 2011. All rights reserved ...

Page 20

... Hz Ω μ DDP L L TFA9881 001aam636 (W) o 001aam635 (W) o © NXP B.V. 2011. All rights reserved ...

Page 21

... μ DDP −1 (1) (2) −2 − 100 mW Ω μ DDP L L TFA9881 001aam640 (Hz) i 001aam639 (Hz) i © NXP B.V. 2011. All rights reserved ...

Page 22

... V = 3.6 V. DDP ( DDP = 4 Ω μ 200 mV (RMS ripple TFA9881 001aam642 (4) (3) (2) ( (Hz 100 mW o 001aam644 (Hz) ripple © NXP B.V. 2011. All rights reserved ...

Page 23

... THD Ω μH. (2) THD Ω μH. (3) THD Ω μH. (4) THD 100 Hz, clip control on i TFA9881 001aam650 (1) (2) (3) ( (V) DDP © NXP B.V. 2011. All rights reserved ...

Page 24

... kHz, DPSA 100 η (1) (%) 0.5 1.0 1.5 2.0 2.5 ( 3.6 V. DDP ( DDP = 4 Ω μ kHz, DPSA TFA9881 001aam645 (2) ( (W) o 001aam646 (2) 3.0 3.5 P (W) o © NXP B.V. 2011. All rights reserved ...

Page 25

... bump A1 1 index area Dimensions Unit max 0.6 0.22 0.38 0.28 mm nom min 0.18 0.34 0.24 Outline version IEC TFA9881UK Fig 20. Package outline TFA9881UK (WLCSP9) TFA9881 Product data sheet ∅ ∅ 0.5 scale ...

Page 26

... Package reflow temperature (°C) 3 Volume (mm ) < 350 260 260 250 Figure 21. All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier Figure 21) than a PbSn process, thus Table 19. 350 to 2000 > 2000 260 260 250 245 ...

Page 27

... MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier peak temperature 001aac844 © NXP B.V. 2011. All rights reserved. time ...

Page 28

... AN10365 “Surface mount reflow soldering description”. 15.3.4 Cleaning Cleaning can be done after reflow soldering. TFA9881 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier © NXP B.V. 2011. All rights reserved ...

Page 29

... NXP Semiconductors 16. Revision history Table 20. Revision history Document ID Release date TFA9881 v.2 20110401 • Modifications: Data sheet status changed to ‘Product data sheet’ • Table TFA9881 v.1 20110105 TFA9881 Product data sheet Data sheet status Product data sheet sheet 16: parameter values changed - V Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — ...

Page 30

... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier © NXP B.V. 2011. All rights reserved ...

Page 31

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 April 2011 TFA9881 3.4 W PDM input class-D audio amplifier © NXP B.V. 2011. All rights reserved ...

Page 32

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com TFA9881 All rights reserved. Date of release: 1 April 2011 Document identifier: TFA9881 ...

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