TDA8595 NXP Semiconductors, TDA8595 Datasheet - Page 17

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TDA8595

Manufacturer Part Number
TDA8595
Description
The TDA8595 is a complementary quad Bridge Tied Load (BTL) audio power amplifiermade in BCDMOS technology
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
TDA8595_2
Product data sheet
7.14 Offset detection
7.15 DC load detection
Table 4.
The offset detection can be performed with no input signal (for instance when the DSP is
in mute after a start-up) or with an input signal. In I
output offset is performed, the I
BTL output voltage is within a window with threshold of 1.75 V typical, the latches DBx[D2]
are reset and setting is disabled. If, for instance, after one second an I
performed again and the offset bits are still set, the output has not crossed the offset
threshold during the last second (see
below 1 Hz (one second I
present.
When the DC load detection is enabled with bit IB1[D1], an offset is slowly applied at the
output of the amplifiers during the start-up cycle and the load currents are measured.
Different load levels will be detected to differentiate between normal load, line driver load
or open load (see
Diagnostic
information
Speaker protection
(missing current)
Offset detection
Load detection
Overvoltage
Fig 12. Offset detection
Diagnostic information availability
Figure
Rev. 02 — 21 November 2007
offset
threshold
offset
threshold
I
2
C-bus mode only
I
DIAG pin
can be enabled
no
no
yes
2
C-bus mode
13).
2
C-bus read interval) or an output offset of more than 1.75 V is
2
C-bus latches DBx[D2] will be set. When the amplifier
read = set bit
Figure
disabled
V
V
setting
reset:
O
O
= V
= V
I
2
OUT+
OUT+
…continued
C-bus controlled 4
12). This can mean the applied frequency is
STB pin
no
no
no
no
V
V
2
OUT
OUT
DB1 bit D2 set
read = offset
C-bus mode, if an I
t = 1 s:
t = 1 s:
read = no offset
DB1 bit D2 reset
t
t
001aad175
45 W power amplifier
Legacy mode
DIAG pin
yes
no
no
yes
2
TDA8595
2
C-bus read is
© NXP B.V. 2007. All rights reserved.
C-bus read of the
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