TDA7340G STMicroelectronics, TDA7340G Datasheet
![IC PROCESSOR AUDIO SIGNAL 44PQFP](/photos/6/93/69388/497-44-pqfp_series_sml.jpg)
TDA7340G
Specifications of TDA7340G
Available stocks
Related parts for TDA7340G
TDA7340G Summary of contents
Page 1
... DEVIATION AND FIELD STRENGTH DE- PENDENT TRIGGER ADJUSTMENT PAUSE DETECTOR: PROGRAMMABLE THRESHOLD ALL FUNCTIONS PROGRAMMABLE VIA I DESCRIPTION 2 The TDA7340G I C bus controlled audio signal processor contains all signal processing blocks of September 1999 AUDIO SIGNAL PROCESSOR ORDERING NUMBER: TDA7340G a high performance car radio, including audio- processor, stereodecoder, noise blanker, pause detector and different mute functions ...
Page 2
... TDA7340G AUDIO PROCESSOR PART FEATURES: Input Multiplexer: DIFFERENTIAL CD STEREO INPUT CASSETTE STEREO INPUT FM STEREO INPUT FROM STEREODE- CODER AM INPUT: MONO OR STEREO MODE (PROGRAMMA- BLE) BEEP INPUT (ONLY IN AM MONO MODE) TELEPHONE DIFFERENTIAL MONO INPUT GAIN PROGRAMMABLE 3.75dB STEPS Loudness: FULLY PROGRAMMABLE ...
Page 3
... BLOCK DIAGRAM R BIN L BOUT L BIN OUT R OUT TDA7340G 3/27 ...
Page 4
... TDA7340G ABSOLUTE MAXIMUM RATINGS Symbol V Operating Supply Voltage S T Operating Temperature Range amb T Storage Temperature Range stg PIN CONNECTION THERMAL DATA Symbol R Thermal Resistance Junction-pins th j-pins ELECTRICAL CHARACTERISTICS ( unless otherwise specified, refer to the Test Circuit.) REF Symbol Parameter SUPPLY V Supply Voltage ...
Page 5
... I RMS 20Hz to 20KHz; Flat 1KHz CM RMS RMS 20Hz to 3 KHz; Flat G = -20 to 20dB G = -20 to -59.7dB Adjacent Attenuation Steps from 0dB to A MAX WIN = 11 WIN = 10 WIN = 01 WIN = 00 0dB to Mute C = 22nF EXT MAX 0 to -20dB MIN TDA7340G Min. Typ. Max. Unit 0.01 0. ...
Page 6
... TDA7340G ELECTRICAL CHARACTERISTICS (continued.) Symbol Parameter BASS CONTROL C Control Range RANGE A Step Resolution STEP R Internal Feedback Resistance B TREBLE CONTROL C Control Range RANGE A Step Resolution STEP SPEAKER ATTENUATORS C Control Range RANGE A Step Resolution STEP A Output Mute Attenuation MUTE E Attenuation Set Error Step ...
Page 7
... VDC f = 20Hz to 16KHz RMS for stereo "ON" for stereo "OFF" 6dB 3.6V (note 26dB 1nF 100mV 13 14 HCC- 100mV HCC- -1.3V (note 6) HCC-VR TDA7340G = 3.5dB un- I amb Min. Typ. Max. Unit 0.5 1.25 V RMS 2.5 3.5 4.5 dB 9.5 11 12.5 dB 1.75 2.5 3. ...
Page 8
... TDA7340G ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter NOISE INTERFERENCE DETECTOR V Trigger Threshold (see pulse slope fig 3) V Rectifier Voltage RECT T Suppression Pulse Duration S I Input Offset Current During OS Suppression Time V Deviation Dependent Rectifier RECTDEV Voltage 9) V Field strength Controlled Rectifier RECTFS Voltage 10) ...
Page 9
... OVD represent the SPKR_LR bit pair D 10) FSC represent the SPKR_RF bit pair D 11) The TDA7340G has a dedicated internal circuitry providing a soft power-on. The I2C bus data programmation must start after the reference DC level has reached the target Vs/2 value, otherwise a pop can be generated. The Cref pin and Out pins rise time at power on are riported in Figg ...
Page 10
... TDA7340G Figure 1: High Cut Control Figure 3 V MPX V TH DC-LEVEL D94AU185 HIGH BUS INTERFACE PROTOCOL The interface protocol comprises: A start condition (s) A chip address byte, (the LSB bit determines read/write transmission). CHIP ADDRESS MSB LSB R/W D95AU216 ACK = Acknowledge S = Start P = Stop ...
Page 11
... Quasi Diff Full Diff Stereo Decoder Cassette Stereo Mono Telephone Mono Beep Mono Stereo Not allowed Not allowed Not allowed 0 11.25dB gain 1 7.5dB Gain 0 3.75dB Gain Gain 0dB Differential input Gain (CD Input) -6dB Differential input Gain (CD Input) TDA7340G FUNCTION FUNCTION 11/27 ...
Page 12
... TDA7340G LOUDNESS MSB For example to select -17.5dB loudness the Data Byte is: XXX01110 Note (1): If the loudness is switched OFF, the loudness stage is acting like a volume attenuator with flat frequency response determine the attenuation level MUTE MSB additional direct mute function is included in the Speaker Attenuators ...
Page 13
... Stereo Decoder Muted 1 Stereo Decoder Off Forced Mono Noise Blanker Threshold 1 NBT 35mV Noise Blanker Threshold 2 NBT 45mV Noise Blanker Threshold 3 NBT 55mV Noise Blanker Threshold 4 NBT 65mV Pilot Threshold High (P Pilot Threshold Low (P TDA7340G SPEAKER ATTENUATORS LF, LR, RF, RR FUNCTION = 13/27 ...
Page 14
... TDA7340G NOISE BLANKER: SPKR LF MSB NOISE BLANKER: SPKR LR MSB NOISE BLANKER: SPKR RF MSB NOISE BLANKER: SPKR RR MSB See Noise blanker description 14/27 LSB Noise Contrelled Trigger Adjustment (NAT THNOISE V THNOISE V THNOISE V THNOISE Noise Blanker Trigger Threshold Fine Adjust The NBT Threshold is reduced by 5mV ...
Page 15
... For example12dB TREBLE and -8dB BASS give the following Data Byte : 00111001 LSB TREBLE STEPS -14dB -12dB -10dB -8dB -6dB -4dB -2dB 0dB 0dB 2dB 4dB 6dB 8dB 10dB 12dB 14dB BASS STEPS -14dB -12dB -10dB -8dB -6dB -4dB -2dB 0dB 0dB 2dB 4dB 6dB 8dB 10dB 12dB 14dB TDA7340G FUNCTION 15/27 ...
Page 16
... TDA7340G VOLUME MSB For example to select -47.81dB Volume the Data Byte is: 11011001 STATUS AFTER POWER ON RESET VOLUME -59.69dB BASS, TREBLE Treble = +2dB, Bass = 0dB, symmetrical SPKRS LF, RF, LR, RR -37.5dB LOUDNESS OFF, -17.5dB INPUT No input selected, GAIN = 0dB, DIFF CD GAIN = -06dB, FULLY DIFF MODE ...
Page 17
... Input Mode The NB of TDA7340G offers two input modes. The first one uses the internal trigger path and optional the LEVEL input. But the TDA7340G of- fers also an external trigger mode. During this mode the internal MPX trigger path is disabled whereas the high pass at the LEVEL pin is bypassed ...
Page 18
... TDA7340G Figure 4: Block Diagram of the Noise Blanker 80KHz LP 140KHz HP MPX IN 120KHz HP LEVEL 2 I C-BUS D95AU330 Figure 5: Trigger Threshold vs STEPS 18/27 SIGNAL PATH RECT PEAK AUTOMATIC AMP BUF THRESHOLD CONTROL RECT-PEAK 2 4 ADDITIONAL THRESHOLD CONTROL (ATC-SB, MPX_RECT) R PEAK C PEAK 82K 47nF peak VTH MIN ...
Page 19
... V PEAK (V) 3.2 2.3 1.3 0.9 D95AU332A MUTE & PAUSE FEATURES The TDA7340G provides three types of mute, controlled via I2C bus (see pag.12, MUTE BYTE register). SOFT MUTE Bit D0=1 Soft Mute ON Bit D0=0 Soft Mute OFF It allows an automatic soft muting and unmuting of the signal ...
Page 20
... TDA7340G In application, the soft mute ON programmation should be followed by programmation of DIRECT MUTE ON (see later) in order to achieve a final 100dB attenuation. Beside the I2C bus programmation, the Soft Mute ON can be generated in a fast way by forcing a LOW level at pin phone GND, controlled by the P through a transistor. This approach is recom- mended for fast RDS AF switching ...
Page 21
... STOP condition BUS READ MODE The TDA7340G gives to the master a 1 byte "TRANSMITTED INFO" via I2C bus in read mode. The read mode is Master activated by sending the chip address with LSB set to 1, fol- lowed by acknowledge bit. ...
Page 22
... TDA7340G No possibility to change the loud boost rate at a certain volume level. The TDA7340G implements a fully programmable loudness control in 15 steps of 1.25dB. It allows a customized loudness response for each application. The external network connected to the loudness pins LOUD_L and LOUD_R fixes the type of loud- ...
Page 23
... D95AU383 Vout VS=8V Ripple=0.2VRMS AV=-15dB 10K Freq(Hz) Capacitor C =10 F REF BWL 0.5s/DIV SOFT MUTE=ON SLOPE=FAST Vout=500mVrms V V CH1 9V DC CH1 0.5V CH2 20mV SOFT MUTE CH3 0.2V CH4 20mV TDA7340G D95AU381 2 1 TIME D95AU384 Chan 2 1ms 0.2V Chan 3 1ms TIME T/div 1ms ...
Page 24
... TDA7340G Figure 13: Soft Mute ON SOFT MUTE=OFF SLOPE=FAST Vout=500mVrms V Main Menu Pin Csm V Vout CH1 9V DC SOFT MUTE Figure 16: Pause Detector PAUSE DETECTOR ZCW=160mV Cpause=100nF V Vout Main Menu CH2 4.12V DC 24/27 Figure 14: Zero Crossing Mute ON V Panel STATUS Memory Save PANEL Recall ...
Page 25
... Figure 18: Sym _Bass (dB -10 -15 10 100 1K Figure 20: Loudness ATT (dB 100 1K Figure 19: Non_Sym _Bass ATT D95AU393 (dB -10 -15 -20 -25 10K Freq(Hz) 10 D95AU395 10K Freq(Hz) TDA7340G D95AU394 100 1K 10K Freq(Hz) 25/27 ...
Page 26
... TDA7340G mm DIM. MIN. TYP. MAX. A 2.45 A1 0.25 A2 1.95 2.00 2.10 B 0.30 0.45 c 0.13 0.23 D 12.95 13.20 13.45 D1 9.90 10.00 10.10 D3 8.00 e 0.80 E 12.95 13.20 13.45 E1 9.90 10.00 10.10 E3 8.00 L 0.65 0.80 0. (min.), 7 (max 26/27 inch MIN. TYP. MAX. 0.096 ...
Page 27
... STMicroelectronics – Printed in Italy – All Rights Reserved Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. The ST logo is a registered trademark of STMicroelectronics STMicroelectronics GROUP OF COMPANIES http://www.st.com TDA7340G 27/27 ...