ADUC814 Analog Devices, ADUC814 Datasheet - Page 8

• Manufacturer Part Number: ADUC814
• Description: Precision Analog Microcontroller: 1.3MIPS 8052 MCU + 8kB Flash + 6-Ch 12-Bit ADC + Dual 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of ADUC814

• Mcu Core: 8052
• Mcu Speed (mips): 1.3
• Sram (bytes): 256Bytes
• Gpio Pins: 17
• Adc # Channels: 6

ADuC814
1
2
3
4
5
6
7
8
9
10
11
12
13
need to be shorted together for correct operation.
14
15
16
17
18
19
20
21
Temperature range –40ºC to +125ºC.
ADC linearity is guaranteed when operating in nonpipelined mode, i.e., ADC conversion followed sequentially by a read of the ADC result. ADC linearity is also
ADC LSB size = V
Offset and gain error and offset and gain error match are measured after factory calibration.
Based on external ADC system components the user may need to execute a system calibration to remove additional external channel errors
Measured with coherent sampling system using external 16.77 MHz clock via P3.5 (Pin 22).
SNR calculation includes distortion and noise components.
Channel-to-channel crosstalk is measured on adjacent channels.
The temperature monitor gives a measure of the die temperature directly; air temperature can be inferred from this result.
guaranteed during normal MicroConverter core operation.
and achieve these specifications.
and 100 pF.
capacitor chosen for both the V
derates with junction temperature as shown in Figure 33 in the Flash/EE memory description section.
DAC linearity is calculated using a reduced code range of 48 to 4095, 0 V to V
DAC differential nonlinearity specified on 0 V to V
Measured with V
When using an external reference device, the internal band gap reference input can be bypassed by setting the ADCCON1.6 bit. In this mode, the V
These numbers are not production tested but are guaranteed by design and/or characterization data on production release.
Pins configured in I
These typical specifications assume no loading on the XTAL2 pin. Any additional loading on the XTAL2 pin increases the power-on times.
Flash/EE memory reliability characteristics apply to both the Flash/EE program memory and the Flash/EE data memory.
Endurance is qualified to 100 kcycles as per JEDEC Std. 22, Method A117 and measured at –40ºC, +25°C, and +125°C; typical endurance at +25°C is 700 kcycles.
Retention lifetime equivalent at junction temperature (T
Power supply current consumption is measured in normal, idle, and power-down modes under the following conditions:
DV
DD
power supply current increases typically by 3 mA (3 V operation) and 10 mA (5 V operation) during a Flash/EE memory program or erase cycle.
Normal Mode: Reset and all digital I/O pins = open circuit, core Clk changed via CD bits in PLLCON, core executing internal software loop.
Idle Mode: Reset and all digital I/O pins = open circuit, core Clk changed via CD bits in PLLCON, PCON.0 = 1, core execution suspended in idle mode.
Power-Down Mode: Reset and all P1.2–P1.7 pins = 0.4 V; all other digital I/O pins are open circuit, Core Clk changed via CD bits in PLLCON, PCON.1 = 1,
Core execution suspended in power-down mode, OSC turned on or off via OSC_PD bit (PLLCON.7) in PLLCON SFR.
REF
REF
/2
2
and C
C compatible mode or SPI mode; pins configured as digital inputs during this test.
12
, i.e., for internal V
REF
pins decoupled with 0.1 µF capacitors to ground. Power-up time for the internal reference is determined by the value of the decoupling
REF
and C
REF
REF
pins.
= 2.5 V, 1 LSB = 610 µV, and for external V
REF
and 0 to V
J
) = 55°C as per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6 eV
DD
ranges.
Rev. A | Page 8 of 72
REF
range; a reduced code range of 48 to 3950, 0 V to V
REF
= 1 V, 1 LSB = 244 µV.
DD
range. DAC output load = 10 kΩ
REF
and C
REF
pins