ADM1075 Analog Devices, ADM1075 Datasheet - Page 9
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ADM1075
Manufacturer Part Number
ADM1075
Description
?48 V Hot Swap Controller and Digital Power Monitor with PMBus Interface
Manufacturer
Analog Devices
Datasheet
1.ADM1075.pdf
(52 pages)
Specifications of ADM1075
Uv & Ov Detection
OV pin,UVH pin,UVL pin
I Monitor Accuracy (+/-%)
1%
Other Inputs
CONV Pin,RESTARTb,SHDNb
Other Outputs
GPO1/ALERT1b/CONV,GPO2/ALERT2B,LATCHb,PWRGDb,SPLYGDb
Package
28 ld TSSOP,28-ld LFCSP
Available stocks
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Part Number
Manufacturer
Quantity
Price
Data Sheet
Parameter
ADR PIN
SERIAL BUS DIGITAL INPUTS (SDAI/SDAO, SCL)
SERIAL BUS TIMING
Table 2.
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
1
2
SCLK
BUF
HD;STA
SU;STA
SU;STO
HD;DAT
SU;DAT
LOW
HIGH
R
F
OF
SDAI and SDAO tied together.
t
R
2
Address Set to 00
Input Current for Address 00
Input High Voltage, V
Input Low Voltage, V
Output Low Voltage, V
Input Leakage, I
Address Set to 01
Address Set to 10
Address Set to 11
Input Current for Address 11
Nominal Bus Voltage, V
Capacitive Load per Bus Segment, C
Capacitance for SDAI, SDAO, or SCL Pin, C
Input Glitch Filter, t
= (V
IL(MAX)
– 0.15) to (V
SDA
SCL
LEAK-PIN
Description
Clock frequency
Bus free time
Start hold time
Start setup time
Stop setup time
SDA
SDA
SCL low time
SCL high time
SCL, SDA
SCL, SDA
SCL, SDA
V
V
V
V
IH
IH
IL
IL
IH3V3
SP
IL
1
1
IH
setup time
hold time
OL
+ 0.15) and t
DD
P
1
1
1
rise time
fall time
output fall time
t
BUF
F
S
= 0.9 V
BUS
DD
t
PIN
LOW
t
HD;STA
to (V
t
HD;DAT
IL(MAX)
Min
0
−40
135
−1
2.1
1.1
−10
−5
2.7
0
Min
1.3
0.6
0.6
0.6
300
100
1.3
0.6
20
20
20 + 0.1 × C
– 0.15); where V
t
R
Figure 2. Serial Bus Timing Diagram
Typ
−22
150
3
5
t
HIGH
BUS
Rev. 0 | Page 9 of 52
IH3V3
Typ
Max
0.8
165
+1
10
0.8
0.4
+10
+5
5.5
400
50
= 2.1 V, and V
t
F
t
SU;STA
t
Max
400
900
300
300
250
SU;DAT
Unit
V
μA
kΩ
μA
V
μA
V
V
V
μA
μA
V
pF
pF
ns
DD
= 3.3 V.
Unit
kHz
μs
μs
μs
μs
ns
ns
μs
μs
ns
ns
ns
S
Test Conditions/Comments
See Table 6
Resistor to VEE
No connect state; maximum leakage current allowed
Device is not powered
Connect to VEE
V
Connect to VCAP
V
allowable current draw from VCAP
I
3 V to 5 V ±10%
OL
ADR
ADR
= 4 mA, SDAO only
= 0 V to 0.8 V
= 2.0 V to VCAP; must not exceed the maximum
Test Conditions/Comments
t
SU;STO
P
ADM1075