ADM1075 Analog Devices, ADM1075 Datasheet - Page 28
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ADM1075
Manufacturer Part Number
ADM1075
Description
?48 V Hot Swap Controller and Digital Power Monitor with PMBus Interface
Manufacturer
Analog Devices
Datasheet
1.ADM1075.pdf
(52 pages)
Specifications of ADM1075
Uv & Ov Detection
OV pin,UVH pin,UVL pin
I Monitor Accuracy (+/-%)
1%
Other Inputs
CONV Pin,RESTARTb,SHDNb
Other Outputs
GPO1/ALERT1b/CONV,GPO2/ALERT2B,LATCHb,PWRGDb,SPLYGDb
Package
28 ld TSSOP,28-ld LFCSP
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ADM1075
PMBus INTERFACE
The I
to communicate. It defines the electrical specifications, the bus
timing, the physical layer, and some basic protocol rules.
SMBus is based on I
fault-tolerant bus. Functions such as bus timeout and packet
error checking are added to help achieve this robustness, along
with more specific definitions of the bus messages used to read
and write data to devices on the bus.
PMBus is layered on top of SMBus and, in turn, on I
SMBus defined bus messages, PMBus defines a set of standard
commands that can be used to control a device that is part of a
power chain.
The
System Management Protocol Specification , Part I and Part II,
Revision 1.2. This version of the standard is intended to provide
a common set of commands for communicating with dc-to-dc
type devices. However, many of the standard PMBus commands
can be mapped directly to the functions of a hot swap controller.
Part I and Part II of the PMBus standard describe the basic
commands and how they can be used in a typical PMBus setup.
The following sections describe how the PMBus standard and
the
DEVICE ADDRESSING
The
ADM1075-2. The PMBus address is seven bits in size. The
upper five bits (MSBs) of the address word are fixed and are
different for each model, as follows:
•
•
The
is used to select one of four possible addresses for a given
model. The ADR pin connection selects the lowest two bits
(LSBs) of the 7-bit address word (see Table 6).
Table 6. PMBus Addresses and ADR Pin Connection
Value of Address LSBs
00
01
10
11
ADM1075
ADM1075
ADM1075
ADM1075-1
ADM1075-1: Base address is 00100xx (0x10)
ADM1075-2: Base address is 00110xx (0x18)
2
C bus is a common, simple serial bus used by many devices
specific commands are used.
command set is based upon the PMBus™ Power
is available in two models: the
and
2
C and aims to provide a more robust and
ADM1075-2
ADR Pin Connection
Connect to VEE
150 kΩ resistor to VEE
No connection (floating)
Connect to VCAP
have a single ADR pin that
ADM1075-1
2
C. Using the
and
Rev. 0 | Page 28 of 52
SMBus PROTOCOL USAGE
All I
SMBus defined bus protocols. The following SMBus protocols
are implemented by the ADM1075:
•
•
•
•
•
•
•
PACKET ERROR CHECKING
The
error checking (PEC) byte that is defined in the SMBus standard.
The PEC byte is transmitted by the
transaction or sent by the bus host to the
write transaction. The
all the SMBus protocols that it implements.
The use of the PEC byte is optional. The bus host can decide
whether to use the PEC byte with the
by-message basis. There is no need to enable or disable PEC in
the ADM1075.
The PEC byte is used by the bus host or the
errors during a bus transaction, depending on whether the trans-
action is a read or a write. If the host determines that the PEC
byte read during a read transaction is incorrect, it can decide to
repeat the read if necessary. If the
PEC byte sent during a write transaction is incorrect, it ignores
the command (does not execute it) and sets a status flag.
Within a group command, the host can choose to send or not
send a PEC byte as part of the message to the ADM1075.
2
ADM1075
Send byte
Receive byte
Write byte
Read byte
Write word
Read word
Block read
C transactions on the
PMBus interface supports the use of the packet
ADM1075
ADM1075
ADM1075
supports the use of PEC with
ADM1075
ADM1075
are performed using
ADM1075
ADM1075
determines that the
Data Sheet
during a read
on a message-
during a
to detect