AD8432 Analog Devices, AD8432 Datasheet - Page 2

• Manufacturer Part Number: AD8432
• Description: Dual-Channel Ultralow Noise Amplifier with Selectable Gain and Input Impedance
• Manufacturer: Analog Devices

Specifications of AD8432

• Vcc-vee: 4.5V to 5.5V
• Isy Per Amplifier: 12mA
• Packages: CSP
• -3db Bandwidth: 200MHz
• Slew Rate: 170V/µs
• Vos: 1mV
• Ib: n/a
• # Opamps Per Pkg: 2
• Input Noise (nv/rthz): 0.8nV/rtHz

AD8432
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Test Circuits ..................................................................................... 16
Theory of Operation ...................................................................... 18
REVISION HISTORY
3/11—Rev. A to Rev. B
Changes to Format ......................................................................... 21
2/10—Rev. 0 to Rev. A
Changes to General Description .................................................... 1
Changes to Figure 5, Figure 6, Figure 7, Figure 8 ......................... 7
Added Figure 27, Figure 29, and Figure 31, Renumbered
Sequentially ..................................................................................... 11
Added Figure 33 and Figure 35..................................................... 12
Changes to Figure 58 ...................................................................... 16
10/09—Revision 0: Initial Version
Thermal Resistance ...................................................................... 5
Maximum Power Dissipation ..................................................... 5
ESD Caution .................................................................................. 5
Low Noise Amplifier (LNA) ..................................................... 18
Rev. B | Page 2 of 28
Applications Information .............................................................. 21
Evaluation Board ............................................................................ 25
Outline Dimensions ....................................................................... 28
Gain Setting Technique ............................................................. 18
Active Input Resistance Matching............................................ 19
Typical Setup ............................................................................... 21
I/Q Demodulation Front End ................................................... 23
Differential-to-Single-Ended Conversion ............................... 24
Gain Setting ................................................................................. 25
Schematic..................................................................................... 26
Power Supply ............................................................................... 27
Input Termination ...................................................................... 27
Output .......................................................................................... 27
Ordering Guide .......................................................................... 28