AD768 Analog Devices, AD768 Datasheet
AD768
Specifications of AD768
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AD768 Summary of contents
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... An ex- ternal reference may also be used. 5. The current output(s) of the AD768 may be used singly or differentially, either into a load resistor, external op amp summing junction or transformer. 6. Proper selection of an external resistor and compensation ...
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... AD768–SPECIFICATIONS Parameter RESOLUTION 1 DC ACCURACY Linearity Error MIN MAX Differential Nonlinearity MIN MAX Monotonicity (13-Bit) ANALOG OUTPUT Offset Error Gain Error 2 Full-Scale Output Current Output Compliance Range Output Resistance Output Capacitance REFERENCE OUTPUT Reference Voltage ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD768 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... DB4 11 18 DB5 12 17 DB6 13 16 DB7 CONNECT = +5 –5 mA, unless otherwise noted REFIN AD768ACHIPS Limit Units 8 LSB max 6 LSB max 0.2 % FSR max 1.0 % FSR max 1 nom. 2.5 V max 40 mA max 73 mA max 600 mW max PIN DESCRIPTIONS Name and Function DAC Current Output ...
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... CLOCK 16 Figure 1. Functional Block Diagram and Basic Hookup FUNCTIONAL DESCRIPTION The AD768 is a current-output DAC with a nominal full-scale current and output impedance. Differential outputs are provided to support single-ended or differential applications. The DAC architecture combines segmented cur- rent sources for the top four bits (MSBs) and R-2R lad- der for the lower 12 bits (LSBs) ...
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... LOAD LAD REF Note the AD768 is optimized for operation at an input current of 5 mA. Both linearity and dynamic performance at other input currents may be somewhat degraded. Figure 4 shows typical dc linearity over a range of input currents. Figure 5 shows typical , allowing for cancel- SFDR (to Nyquist) performance over a range of input currents and CLOCK input rates for a 1 MHz output frequency ...
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... Both IOUTA and IOUTB provide similar dynamic perfor- REF mance. Refer to Figures 8 and 9 for typical INL and DNL per- formance curves. The outputs can also be used differentially. Refer to the section “Applying the AD768” for examples of vari- ous output configurations. –7– AD768 ...
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... The AD768 digital inputs consist of 16 data input pins and a clock pin. The 16-bit parallel data inputs follow standard posi- tive binary coding, where DB15 is the most significant bit (MSB) and DB0 is the least significant bit (LSB). IOUTA pro- duces full-scale output current when all data bits are at logic 1 ...
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... CLOCK = 20MHz – FREQUENCY – MHz Figure 18. SFDR (Within a Window) vs. F OUT REV. B Typical Performance Curves––AD768 –0.470 –0.472 –1V OUT –0.474 –0.476 –0.478 –0.480 –0.482 TIME – ...
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... DAC ladder that may give rise to additional nonlinearities. AC-Coupled Output Configuring the output as shown in Figure 22 provides a bipolar output signal from the AD768 without requiring the use of a summing amplifier. The ac load impedance presented to the DAC output is the parallel combination of the AD768’s output impedance, R ...
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... AC Coupling via a Transformer Applications that do not require baseband operation typically use transformer coupling. Transformer coupling the comple- mentary outputs of the AD768 to a load has the inherent benefit of providing electrical isolation while consuming no additional power. Also, a properly applied transformer should not degrade the AD768’ ...
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... AD768 Figure 28. Printed Circuit Board Ground Plane Layout Figure 29. Printed Circuit Board Power Plane Layout –12– REV. B ...
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... MHz and above. Ceramic and film type capacitors generally feature lower series inductance than tantalum or electrolytic types recommended that each power supply to the AD768 be de- coupled by a 0.1 F capacitor located as close to the device pins as possible. Surface-mount chip capacitors, by virtue of their low parasitic inductance, are preferable to through-hole types ...
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... MSPS sample rate. These time points are then put through an FIR interpolation filter to upsample (in this case to 4.4 MSPS). The bit stream is run through the AD768, which is followed by a 4th order analog smoothing filter, then run to the line-driving circuitry ...
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... JP4 must be removed for proper operation. The output is available on the “B” connector and has a nominal voltage swing determined by the combination of resistors R3, R9, and R10. This op amp is not provided with the AD768-EB. Reference Either the internal reference of the AD768 or an external refer- ence may be selected on the AD768-EB ...
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... AD768 despite some pins being labeled “digital” ground and some as “analog” ground. A complete parts list for the AD768 evaluation board is given in Table IV. Table III. Summary of Jumper Functionality ...
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... SW1 2 R11 Figure 35. AD768 Evaluation Board Schematic –17– AD768 JP5 1 R10 2 499 + JP1 0.1µF U3 JP2 AD811 0.1µF A JP3 –V EE JP4 C9 C10 47µ ...
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... AD768 Figure 36. Silkscreen Layer (Not to Scale) –18– REV. B ...
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... Figure 37. Component Side PCB Layout (Not to Scale) Figure 38. Solder Side PCB Layout (Not to Scale) REV. B –19– AD768 ...
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... AD768 0.0118 (0.30) 0.0040 (0.10) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). R-28 300 Mil 28-Pin SOIC 0.7125 (18.10) 0.6969 (17.70 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00 PIN 1 0.1043 (2.65) 0.0926 (2.35) 0.0500 0.0192 (0.49) SEATING 0.0125 (0.32) (1.27) 0.0138 (0.35) PLANE BSC 0.0091 (0.23) –20– 0.0291 (0.74 0.0098 (0.25) 0.0500 (1.27 0.0157 (0.40) REV. B ...