AD5532HS Analog Devices, AD5532HS Datasheet - Page 6

• Manufacturer Part Number: AD5532HS
• Description: 32-Channel 14-Bit bipolar DAC with High Speed 3-Wire Serial Interface
• Manufacturer: Analog Devices

Specifications of AD5532HS

• Resolution (bits): 14bit
• Dac Update Rate: 1.1MSPS
• Dac Settling Time: 10µs
• Max Pos Supply (v): +12V
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

AD5532HS
Pin
AGND (1–2)
AV
V
V
DGND
DV
DAC_GND (1–2)
REF_IN
V
SYNC
SCLK*
D
OFFS_IN
RESET*
*Internal pull-up device on this logic input. Therefore, it can be left floating and will default to a logic high condition.
TERMINOLOGY
Integral Nonlinearity (INL)
A measure of the maximum deviation from a straight line pass-
ing through the endpoints of the DAC transfer function. It is
expressed as a percentage of full-scale range.
Differential Nonlinearity (DNL)
The difference between the measured change and the ideal 1 LSB
change between any two adjacent codes. A specified DNL of
± 1 LSB maximum ensures monotonicity.
Offset Error
A measure of the error present at the device output with all 0s
loaded to the DAC. It includes the offset of the DAC and the
output amplifier. It is expressed in mV.
Full-Scale Error
A measure of the output error with all 1s loaded to the DAC.
Ideally the output should be 2 REF_IN if OFFS_IN = 0. It is
expressed as a percentage of full-scale range.
DC Power-Supply Rejection Ratio (PSRR)
A measure of the change in analog output for a change in supply
voltage (V
varied ± 5%.
DC Crosstalk
The dc change in the output level of one DAC at midscale in
response to a full-scale code change (all 0s to all 1s and vice
versa) and output change of all other DACs. It is expressed in µV.
Output Temperature Coefficient
A measure of the change in analog output with changes in tem-
perature. It is expressed in ppm/°C.
DD
SS
OUT
IN
CC
CC
*
(1–4)
(1–4)
0–V
(1–2)
OUT
DD
31
and V
SS
). It is expressed in dB. V
Function
Analog GND Pins.
Analog Supply Pins. Voltage range from 4.75 V to 5.25 V.
V
V
Digital GND Pins.
Digital Supply Pins. Voltage range from 2.7 V to 5.25 V.
Reference GND Supply for All the DACs.
Reference Voltage for Channels 0–31.
Analog Output Voltages from the 32 Channels.
Active Low Input. This is the Frame Synchronization signal for the serial interface. While SYNC is low,
data is transferred in on the falling edge of SCLK.
Serial Clock Input. Data is clocked into the shift register on the falling edge of SCLK. This
operates at clock speeds up to 30 MHz.
Serial Data Input. Data must be valid on the falling edge of SCLK.
Offset Input. The user can connect this to GND or REF_IN to determine the output span.
Active Low Input. This pin can also be used to reset the complete device to its power-on-reset conditions.
DD
SS
Supply Pins. Voltage range from –4.75 V to –12 V.
Supply Pins. Voltage range from 8 V to 12 V.
PIN FUNCTION DESCRIPTIONS
DD
and V
SS
are
–6–
Output Voltage Settling Time
The time taken from when the last data bit is clocked into the
DAC until the output has settled to within ± 0.5 LSB of its
final value.
Digital-to-Analog Glitch Impulse
The area of the glitch injected into the analog output when
the code in the DAC register changes state. It is specified as
the area of the glitch in nV-secs when the digital code is changed
by 1 LSB at the major carry transition (011 . . . 11 to 100 . . . 00
or 100 . . . 00 to 011 . . . 11).
Digital Crosstalk
The glitch impulse transferred to the output of one DAC at
midscale while a full-scale code change (all 1s to all 0s and vice
versa) is being written to another DAC. It is expressed in nV-secs.
Analog Crosstalk
The area of the glitch transferred to the output (V
DAC due to a full-scale change in the output (V
DAC. The area of the glitch is expressed in nV-secs.
Digital Feedthrough
A measure of the impulse injected into the analog outputs from the
digital control inputs when the part is not being written to, i.e.,
SYNC is high. It is specified in nV-secs and measured with a
worst-case change on the digital input pins, e.g., from all 0s
to all 1s and vice versa.
Output Noise Spectral Density
A measure of internally generated random noise. Random noise is
characterized as a spectral density (voltage per root Hertz). It is
measured by loading all DACs to midscale and measuring
noise at the output. It is measured in nV/√Hz.
OUT
) of another
OUT
) of one
REV. 0