AD5381 Analog Devices, AD5381 Datasheet - Page 14

• Manufacturer Part Number: AD5381
• Description: 40-Channel 12-Bit 3 V/5 V Single-Supply Voltage-Output DAC
• Manufacturer: Analog Devices

Specifications of AD5381

• Resolution (bits): 12bit
• Dac Update Rate: 167kSPS
• Dac Settling Time: 6µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Par,Ser,SPI

AD5381
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 10. Pin Function Descriptions
Mnemonic
VOUTx
SIGNAL_GND(1–5)
DAC_GND(1–5)
AGND(1–5)
AVDD(1–5)
DGND
DVDD
REFGND
Function
Buffered Analog Outputs for Channel x. Each analog output is driven by a rail-to-rail output amplifier operating at a
gain of 2. Each output is capable of driving an output load of 5 kΩ to ground. Typical output impedance is 0.5 Ω.
Analog Ground Reference Points for Each Group of Eight Output Channels. All SIGNAL_GND pins are tied together
internally and should be connected to the AGND plane as close as possible to the AD5381.
Each group of eight channels contains a DAC_GND pin. This is the ground reference point for the internal 12-bit DAC.
These pins shound be connected to the AGND plane.
Analog Ground Reference Point. Each group of eight channels contains an AGND pin. All AGND pins should be
connected externally to the AGND plane.
Analog Supply Pins. Each group of eight channels has a separate AVDD pin. These pins are shorted internally and
should be decoupled with a 0.1 μF ceramic capacitor and 10 μF tantalum capacitor. Operating range for the
AD5381-5 is 4.5 V to 5.5 V; operating range for the AD5381-3 is 2.7 V to 3.6 V.
Ground for All Digital Circuitry.
Logic Power Supply. Guaranteed operating range is 2.7 V to 5.5 V. It is recommended that these pins be decoupled
with a 0.1 μF ceramic and a 10 μF tantalum capacitors to DGND.
Ground Reference Point for the Internal Reference.
REFOUT/REFIN
SIGNAL_GND4
SIGNAL_GND1
DAC_GND4
DAC_GND1
REFGND
VOUT27
FIFO EN
VOUT24
VOUT25
VOUT26
VOUT28
VOUT29
VOUT30
VOUT31
AGND4
AGND1
AVDD4
AVDD1
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
CLR
10
11
13
14
15
16
17
18
19
20
22
23
24
25
12
21
1
2
3
4
5
6
7
8
9
NC = NO CONNECT
PIN 1
IDENTIFIER
Figure 8. 100-Lead LQFP Pin Configuration
Rev. B | Page 14 of 40
(Not to Scale)
AD5381
TOP VIEW
75
74
73
72
70
69
68
67
66
65
64
63
61
60
59
58
57
56
55
54
53
51
71
62
52
RESET
DB5
DB4
DB3
DB2
DB1
DB0
NC
NC
REG0
REG1
VOUT23
VOUT22
VOUT21
VOUT20
AVDD3
AGND3
DAC_GND3
SIGNAL_GND3
VOUT19
VOUT18
VOUT17
VOUT16
AVDD2
AGND2