AD5066 Analog Devices, AD5066 Datasheet

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AD5066

Manufacturer Part Number
AD5066
Description
Fully Accurate, 16-Bit, UnBuffered VOUT Quad SPI Interface, 2.7 V to 5.5 V nanoDAC in a TSSOP
Manufacturer
Analog Devices
Datasheet

Specifications of AD5066

Resolution (bits)
16bit
Dac Settling Time
12µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Unbuffered Vout
Dac Input Format
Ser,SPI

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AD5066BRUZ
Manufacturer:
Analog Devices Inc
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AD5066BRUZ
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FEATURES
Low power quad 16-bit nanoDAC, ±1 LSB INL
Low total unadjusted error of ±0.1 mV typically
Low zero code error of 0.05 mV typically
Individually buffered reference pins
2.7 V to 5.5 V power supply
Specified over full code range of 0 to 65535
Power-on reset to zero scale or midscale
Per channel power-down with 3 power-down functions
Hardware LDAC with software LDAC override function
CLR
Small 16-lead TSSOP
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
GENERAL DESCRIPTION
The AD5066 is a low power, 16-bit quad-channel, unbuffered
voltage output nanoDAC® offering relative accuracy specifica-
tions of ±1 LSB INL with individual reference pins and can
operate from a single 2.7 V to 5.5 V supply. The AD5066 also
offers a differential accuracy specification of ±1 LSB DNL.
Reference buffers are also provided on-chip. The part uses a
versatile 3-wire, low power Schmitt trigger serial interface that
operates at clock rates up to 50 MHz and is compatible with
standard SPI®, QSPI™, MICROWIRE™, and most DSP interface
standards. The AD5066 incorporates a power-on reset circuit
that ensures the DAC output powers up to zero scale or
midscale and remains there until a valid write to the device
takes place.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
function to programmable code
SCLK
SYNC
DIN
AD5066
LDAC
INTERFACE
LOGIC
LDAC
CLR
FUNCTIONAL BLOCK DIAGRAM
POWER-ON RESET
Fully Accurate, 16-Bit, Unbuffered V
REGISTER
REGISTER
REGISTER
REGISTER
INPUT
INPUT
INPUT
INPUT
POR
V
DD
Interface, 2.7 V to 5.5 V nanoDAC in a TSSOP
Figure 1.
REGISTER
REGISTER
REGISTER
REGISTER
DAC
DAC
DAC
DAC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Total unadjusted error for the part is <0.8 mV. Zero code error
for the part is 0.05 mV typically.
The AD5066 contains a power-down feature that reduces the
current consumption of the device to typically 400 nA at 5 V
and provides software selectable output loads while in power-
down mode.
The outputs of all DACs can be updated simultaneously using
the hardware LDAC function, with the added functionality of
user software selectable DAC channels to update simultaneously.
There is also an asynchronous CLR that clears all DACs to a
software-selectable code—0 V, midscale, or full scale.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
6.
Table 1. Related Devices
Part No.
AD5666
AD5025/AD5045/AD5065
AD5024/AD5044/AD5064
AD5062
AD5063
AD5061
AD5040/AD5060
1
±1 LSB INL
V
REF
V
REF
Quad channel available in 16-lead TSSOP, ±1 LSB INL.
Individually buffered voltage reference pins.
TUE = ±0.8 mV max and zero code error = 0.1 mV max.
High speed serial interface with clock speeds up to 50 MHz.
Three power-down modes available to the user.
Reset to known output voltage (zero scale or midscale).
C
DAC A
DAC B
DAC C
DAC D
1
1
A
V
REF
V
REF
D
POWER-DOWN LOGIC
B
1
©2009–2010 Analog Devices, Inc. All rights reserved.
GND
1
1
Description
Quad,16-bit buffered DAC,16 LSB INL, TSSOP
Dual,12-/14-/16-bit buffered nanoDAC,
TSSOP
Quad 16-bit nanoDAC, TSSOP
Single, 16-bit nanoDAC, SOT-23
Single, 16-bit nanoDAC, MSOP
Single,16-bit nanoDAC, ±4 LSB INL, SOT-23
14-/16-bit nanoDAC, SOT-23
V
V
V
V
OUT
OUT
OUT
OUT
A
B
C
D
OUT
, Quad SPI
AD5066
www.analog.com

Related parts for AD5066

AD5066 Summary of contents

Page 1

... LSB INL with individual reference pins and can operate from a single 2 5.5 V supply. The AD5066 also offers a differential accuracy specification of ±1 LSB DNL. Reference buffers are also provided on-chip. The part uses a ...

Page 2

... Serial Interface ............................................................................ 15 Input Shift Register .................................................................... 15 Power-On Reset .......................................................................... 17 Clear Code Register ................................................................... 18 LDAC Function ........................................................................... 18 Power Supply Bypassing and Grounding ................................ 19 Microprocessor Interfacing ....................................................... 19 Applications Information .............................................................. 21 Using a Reference as a Power Supply ....................................... 21 Bipolar Operation....................................................................... 21 Using the AD5066 with a Galvanically Isolated Interface .... 21 Outline Dimensions ....................................................................... 22 Ordering Guide .......................................................................... 22 Rev Page ...

Page 3

... Output impedance tolerance ± 400 Ω µ ± 10%, DAC = full scale DD V − 0 ±1 µA Per DAC channel MΩ Per DAC channel ±1 µA 0 5.5 V All digital inputs DAC active, excludes load current and V = GND µA AD5066 DD ...

Page 4

... AD5066 AC CHARACTERISTICS 5.5 V, 2.0 V ≤ REF REF Table Parameter Min DYNAMIC PERFORMACE Output Voltage Settling Time Output Voltage Settling Time Slew Rate Digital-to-Analog Glitch Impulse Reference Feedthrough Digital Feedthrough Digital Crosstalk Analog Crosstalk DAC-to-DAC Crosstalk Total Harmonic Distortion ...

Page 5

... Figure 2. Serial Write Operation Rev Page )/ Min Typ Max 10 AD5066 = 2 Unit µs µ µs ...

Page 6

... AD5066 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter Rating V to GND −0 Digital Input Voltage to GND −0 GND −0 OUT GND −0 REF Operating Temperature Range Industrial −40°C to +125°C Storage Temperature Range − ...

Page 7

... If SYNC is taken high before the 32 SYNC acts as an interrupt, and the write sequence is ignored by the device Power Supply Input. The AD5066 can be operated from 2 5.5 V. Decouple the supply with a 10 µF DD capacitor in parallel with a 0.1 µF capacitor to GND. 4 ...

Page 8

... AD5066 TYPICAL PERFORMANCE CHARACTERISTICS 0.3 0.2 0.1 0 –0.1 –0.2 –0 4.096V REF –0 25°C A –0.5 0 10,000 20,000 30,000 40,000 CODE Figure 4. INL Error vs. Code 0 4.096V REF 0 25°C A 0.1 0 –0.1 –0.2 –0.3 –0.4 0 10,000 20,000 30,000 40,000 CODE Figure 5. DNL Error vs. Code ...

Page 9

... Figure 14. Total Unadjusted Error vs. Temperature –10 –20 –30 –40 –50 100 120 –40 –20 Figure 15. Zero-Code Error vs. Temperature Rev Page AD5066 MAX DNL MIN DNL = 4.096V REF 100 TEMPERATURE (°C) Figure 13. DNL vs. Temperature MAX TUE MIN TUE V ...

Page 10

... AD5066 0.0020 0.0015 0.0010 0.0005 0 –0.0005 –0.0010 –0.0015 V = 4.096V REF –0.0020 –40 – TEMPERATURE (°C) Figure 16. Gain Error vs. Temperature 0.010 0.005 0 –0.005 4.096V REF T = 25°C A –0.010 2.7 3.2 3.7 4.2 V (V) DD Figure 17. Gain Error and Full-Scale Error vs. Supply Voltage ...

Page 11

... DAC LOAD = 9pF 0 100 120 0 V REF T = 25°C A 5.0 5.5 CH1 2.00V CH3 2.00V REF CH1 2.00V 5 6 CH3 2.00V Rev Page AD5066 1/4 TO 3/4 3/4 TO 1/4 = 4.5V = 4.096V = 25° TIME (µs) Figure 25. Settling Time REF V OUT = 4.096V CH2 2.00V M10.00ms ...

Page 12

... AD5066 CH1 = SCLK 1 CH2 = OUT DD POWER-UP TO MIDSCALE OUTPUT UNLOADED 2 CH1 5V CH2 500mV M2µs T 55% Figure 28. Exiting – 4.096V REF – 25°C A CODE = 0x8000 TO 0x7FFF OUTPUT UNLOADED WITH 5kΩ AND 200pF –15 – TIME (µs) Figure 29 ...

Page 13

... 4.096V REF T = 25°C A 50.0mV CH2 5.00V M4.00µs A CH2 T 9.800% Figure 37. Glitch Upon Entering Power Down CH1 PEAK TO PEAK 159mV V OUT LAST SCLK = 5V = 4.096V = 25°C 50.0mV CH2 5.00V M4.00µs A CH2 T 9.800% Figure 38. Glitch Upon Exiting Power Down AD5066 1.80V 1.80V ...

Page 14

... Zero-code error is a measure of the output error when zero code (0x0000) is loaded into the DAC register. Ideally, the output should The zero-code error is always positive in the AD5066, because the output of the DAC cannot go below 0 V. Zero-code error is expressed in millivolts. Figure 17 shows a typical zero-code error vs. supply voltage plot. ...

Page 15

... The AD5066 is a quad 16-bit, serial input, voltage output nanoDAC. The part operates from supply voltages of 2 5.5 V. Data is written to the AD5066 in a 32-bit word format via a 3-wire serial interface. The AD5066 incorporates a power-on reset circuit to ensure the DAC output powers known output state ...

Page 16

... Bringing the SYNC line low enables the DIN and SCLK input buffers. Data from the DIN line is clocked into the 32-bit shift register on the falling edge of SCLK. The serial clock frequency can be as high as 50 MHz, making the AD5066 compatible with high speed DSPs. On the 32 nd ...

Page 17

... The AD5066 contains a power-on reset circuit that controls the output voltage during power-up. By connecting the POR pin low, the AD5066 output powers connecting the POR pin high, the AD5066 output powers up to midscale. The output remains powered up at this level until a valid write sequence is made to the DAC ...

Page 18

... AD5066 CLEAR CODE REGISTER The AD5066 has a hardware CLR pin that is an asynchronous clear input. The CLR input is falling edge sensitive. Bringing the CLR line low clears the contents of the input register and the DAC registers to the data contained in the user-configurable CLR register and sets the analog outputs accordingly (see Table 11) ...

Page 19

... AGND-to-DGND con- nection, make the connection at one point only and as close as possible to the AD5066. Bypass the power supply to the AD5066 with 10 µF and 0.1 µF capacitors. The capacitors should be physically as close as possible to the device, with the 0.1 µF capacitor, ideally, right up against the device. The 10 µ ...

Page 20

... P3.3 is taken high following the completion of this cycle. The 80C51/80L51 output the serial data in a format that has the LSB first. The AD5066 must receive data with the MSB first. The 80C51/80L51 transmit routine should take this into account. ...

Page 21

... for example The voltage reference outputs a steady supply voltage for the AD5066. If the low dropout REF195 is used, it must supply 2 current to the AD5066 with no load on the output of the DAC. 15V 5V ...

Page 22

... AD5066 OUTLINE DIMENSIONS 0.15 0.05 ORDERING GUIDE 1 Model Temperature Range AD5066BRUZ −40°C to +125°C AD5066BRUZ-REEL7 −40°C to +125°C AD5066ARUZ −40°C to +125°C AD5066ARUZ-REEL7 −40°C to +125° RoHS Compliant Part. 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX 0.20 0.09 8° 0.30 0.65 0° 0.19 SEATING BSC ...

Page 23

... NOTES Rev Page AD5066 ...

Page 24

... AD5066 NOTES ©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06845-0-8/10(A) Rev Page ...

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