AD9125 Analog Devices, AD9125 Datasheet - Page 8

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AD9125

Manufacturer Part Number
AD9125
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD9125

Resolution (bits)
16bit
Dac Update Rate
1GSPS
Dac Settling Time
n/a
Max Pos Supply (v)
+3.47V
Single-supply
No
Dac Type
Current Out
Dac Input Format
Par
AD9125
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Mnemonic
CVDD18
DACCLKP
DACCLKN
CVSS
FRAME
NC
IRQ (INT)
D31
D30
NC
IOVDD
DVDD18
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
DCI
Description
1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.
DAC Clock Input, Positive.
DAC Clock Input, Negative.
Clock Supply Common.
Frame Input.
No Connect
Interrupt Request. Open Drain, Active Low Output. Connect external pull-up to IOVDD.
Data Bit 31.
Data Bit 30.
No Connect.
Supply for Serial Port Pin, RESET Pin, and IRQ Pin. 1.8 V to 3.3 V can be applied to this pin.
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
Data Bit 29.
Data Bit 28.
Data Bit 27.
Data Bit 26.
Data Bit 25.
Data Bit 24.
Data Bit 23.
Data Bit 22.
Data Bit 21.
Data Bit 20.
Data Bit 19.
Data Bit 18.
Data Bit 17.
Data Bit 16.
Data Clock Input.
DACCLKN
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD MUST BE CONNECTED TO AVSS.
DACCLKP
CVDD18
DVDD18
FRAME
IOVDD
CVSS
IRQ
D31
D30
D29
D28
D27
D26
D25
D24
NC
NC
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
PIN 1
INDICATOR
Figure 3. Pin Configuration
Rev. 0 | Page 8 of 56
(Not to Scale)
AD9125
TOP VIEW
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
RESET
CS
SCLK
SDIO
SDO
DVDD18
D0
D1
D2
D3
DVSS
DVDD18
D4
D5
D6
D7
D8
D9

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