AD7880 Analog Devices, AD7880 Datasheet - Page 10

• Manufacturer Part Number: AD7880
• Description: CMOS, Single +5 V Supply, Low Power, 12-Bit Sampling ADC
• Manufacturer: Analog Devices

Specifications of AD7880

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 66kSPS
• Interface: Par
• Analog Input Type: SE-Bip,SE-Uni
• Ain Range: Bip (Vref),Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC

AD7880
a write operation starts a conversion. Data is read at the end of
the conversion sequence as before. Figure 19 shows an example
of initiating conversion using this method. A similar implemen-
tation can be used for DSPs. Note that for all interfaces, a read
operation should not be attempted during conversion.
AD7880–MC68000 Interface
An interface between the AD7880 and the MC68000 is shown
in Figure 18. As before, conversion is initiated using an external
timer. The AD7880 BUSY line can be used to interrupt the
processor or, alternatively, software delays can ensure that con-
version has been completed before a read to the AD7880 is at-
tempted. Because of the nature of its interrupts, the 68000
requires additional logic (not shown in Figure 18) to allow it to
be interrupted correctly. For further information on 68000 in-
terrupts, consult the 68000 users manual.
The MC68000 AS and R/W outputs are used to generate a
separate RD input signal for the AD7880. CS is used to drive
the 68000 DTACK input to allow the processor to execute a
normal read operation to the AD7880. The conversion results
are read using the following 68000 instruction:
where D0 is the 68000 D0 register
where
AD7880–8086 Interface
Figure 19 shows an interface between the AD7880 and the
8086 microprocessor. Unlike the previous interface examples,
the microprocessor initiates conversion. This is achieved by gat-
ing the 8086 WR signal with a decoded address output (differ-
ent to the AD7880 CS address). Conversion is initiated and the
result is read from the AD7880 using the following instruction:
where AX is the 8086 accumulator and
where
MOVE.W ADC, D0
MOV AX, ADC
ADC is the AD7880 address
ADC is the AD7880 address
MC68000
Figure 18. AD7880–MC68000 Interface
DTACK
R/W
A15
D15
A0
AS
D0
*ADDITIONAL PINS OMITTED FOR CLARITY
ADDRESS BUS
DATA BUS
EN
DECODE
ADDR
RD
CS
DB11
DB0
AD7880*
CONVST
TIMER
–10–
AD7880–6809 Interface
The AD7880 can also interface quite easily with 8-bit micro-
processors. The 12-bit parallel data output from the AD7880
can be read into the microprocessor as an 8+4 byte structure.
Figure 20 shows an interface to the MC6809 8-bit microproces-
sor. As in previous cases, conversion is initiated using an exter-
nal timer. At the end of conversion, BUSY triggers a one-shot
which drives the IRQ interrupt input of the microprocessor. A
double read is then performed to two unique addresses. The
first read fetches the lower 8 bits (DB0–DB7) and loads the
74HC374 latch with the upper 4 bits (DB8–DB11). The sec-
ond read fetches these upper 4 bits.
MC6809
8086
Figure 19. AD7880–8086 Interface
Figure 20. AD7880–6809 Interface
AD15
ALE
AD0
WR
RD
A15
R/W
IRQ
A0
D0
D7
E
*ADDITIONAL PINS OMITTED FOR CLARITY
*ADDITIONAL PINS OMITTED FOR CLARITY
LATCH
DECODE
ADDR
ADDRESS BUS
ADDRESS/DATA BUS
DATA BUS
OE
Q0
Q3
74HC374
ADDRESS BUS
DECODE
CLK
ADDR
D3
D0
SHOT
ONE
BUSY
DB11
DB8
DB7
DB0
CS
RD
CS
CONVST
RD
DB11
DB0
AD7880*
AD7880*
CONVST
TIMER
REV. 0