AD9243 Analog Devices, AD9243 Datasheet - Page 17

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AD9243

Manufacturer Part Number
AD9243
Description
Complete 14-Bit, 3 MSPS Monolithic A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9243

Resolution (bits)
14bit
# Chan
1
Sample Rate
3MSPS
Interface
Par
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
(2Vref) p-p,2 V p-p,5V p-p,Uni (Vref) x 2,Uni 2.0V,Uni 5.0V
Adc Architecture
Pipelined
Pkg Type
QFP

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REV. A
The AD9243 contains an internal reference buffer, A2 (see
Figure 26), that simplifies the drive requirements of an external
reference. The external reference must be able to drive a 5 k
( 20%) load. Note that the bandwidth of the reference buffer is
deliberately left small to minimize the reference noise contribu-
tion. As a result, it is not possible to change the reference volt-
age rapidly in this mode without the removal of the CAPT/
CAPB Decoupling Network, and driving these pins directly.
Variable Input Span with V
Figure 39 shows an example of the AD9243 configured for an
input span of 2
reference drives the VINB pin thus setting the common-mode
voltage at 2.5 V. The input span can be independently set by a
voltage divider consisting of R1 and R2 which generates the
VREF signal. A1 buffers this resistor network and drives VREF.
Choose this op amp based on accuracy requirements. It is
essential that a minimum of a 10 F capacitor in parallel with a
0.1 F low inductance ceramic capacitor decouple the reference
output to ground.
Figure 39. External Reference, V
Resistor Divider to Make VREF)
Single-Ended Input with 0 to 2
Figure 40 shows an example of an external reference driving
both VINB and VREF. In this case, both the common mode
voltage and input span are directly dependent on the value of
VREF. More specifically, the common-mode voltage is equal to
VREF while the input span is equal to 2 VREF. Thus, the
valid input range extends from 0 to 2
the REF191, a 2.048 external reference was selected, the valid
input range extends from 0 V to 4.096 V. In this case, 1 LSB of
the AD9243 corresponds to 0.250 mV. It is essential that a
minimum of a 10 F capacitor in parallel with a 0.1 F low induc-
tance ceramic capacitor decouple the reference output to ground.
2.5V+VREF
2.5V–VREF
+5V
0.1 F
+5V
2.5V
0.1 F
Figure 40. Input Range = 0 V to 2
2.5V
REF
2xREF
VREF centered at 2.5 V. An external 2.5 V
VREF
0V
0.1 F
22 F
10 F
CM
R1
R2
= 2.5 V
+5V
0.1 F
0.1 F
VREF Range
CM
A1
+5V
0.1 F
= 2.5 V (2.5 V on VINB,
VREF. For example, if
VINB
SENSE
VINA
VREF
AD9243
VREF
VINB
VREF
SENSE
VINA
AD9243
–17–
Low Cost/Power Reference
The external reference circuit shown in Figure 41 uses a low
cost 1.225 V external reference (e.g., AD580 or AD1580) along
with an op amp and transistor. The 2N2222 transistor acts in
conjunction with 1/2 of an OP282 to provide a very low imped-
ance drive for VINB. The selected op amp need not be a high
speed op amp and may be selected based on cost, power, and
accuracy.
Figure 41. External Reference Using the AD1580 and Low
Impedance Buffer
DIGITAL INPUTS AND OUTPUTS
Digital Outputs
The AD9243 output data is presented in positive true straight
binary for all input ranges. Table IV indicates the output data
formats for various input ranges regardless of the selected input
range. A twos complement output data format can be created by
inverting the MSB.
Input (V)
VINA –VINB < – VREF
VINA –VINB = – VREF
VINA –VINB = 0
VINA –VINB = + VREF – 1 LSB 11 1111 1111 1111 0
VINA –VINB
Out Of Range (OTR)
An out-of-range condition exists when the analog input voltage
is beyond the input range of the converter. OTR is a digital
output that is updated along with the data output corresponding
to the particular sampled analog input voltage. Hence, OTR
has the same pipeline delay (latency) as the digital data. It is
LOW when the analog input voltage is within the analog input
range. It is HIGH when the analog input voltage exceeds the
input range as shown in Figure 42. OTR will remain HIGH
+5V
3.75V
1.25V
7.5k
OTR DATA OUTPUTS
1k
1
0
0
0
0
1
AD1580
111111 1111 1111
111111 1111 1111
111111 1111 1110
000000 0000 0001
000000 0000 0000
000000 0000 0000
OP282
1k
1/2
Figure 42. Output Data Format
Table IV. Output Data Format
Condition (V)
+ VREF
0.1 F
1k
10 F
OTR
316
–FS –1/2 LSB
+5V
–FS +1/2 LSB
820
–FS
2N2222
0.1 F
Digital Output
00 0000 0000 0000 1
00 0000 0000 0000 0
10 0000 0000 0000 0
11 1111 1111 1111 1
10 F
+5V
1.225V
+FS –1 1/2 LSB
0.1 F
AD9243
+FS –1/2 LSB
+FS
VINB
VINA
VREF
SENSE
AD9243
OTR

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