AD7729 Analog Devices, AD7729 Datasheet - Page 13

• Manufacturer Part Number: AD7729
• Description: 3 V, Dual Sigma-Delta ADC with Auxiliary DAC
• Manufacturer: Analog Devices

Specifications of AD7729

• Resolution (bits): 15bit
• # Chan: 2
• Sample Rate: 13MSPS
• Interface: Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (2Vref) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: SOIC,SOP

Name
Reserved
Reserved
Reserved
IRxOFFSET
QRxOFFSET
Reserved
Reserved
RxDELAY1
RxDELAY2
ARDADDR
BRDADDR
Reserved
AUXDAC
Reserved
Reserved
Reserved
Reserved
Reserved
ACRA
ACRB
BCRA
BCRB
Reserved
Reserved
Reserved
ASCLKRATE
BSCLKRATE
BRESET: can be reset using pin RESETB or bit BRESET.
ARESET: can be reset using pin RESETB or bit ARESET.
SRESET: only the pin RESETB can reset these registers.
REV. 0
Table IV. Baseband and Auxiliary Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
000000 (0)
000001 (1)
000010 (2)
000011 (3)
000100 (4)
000101 (5)
000110 (6)
000111 (7)
001000 (8)
001001 (9)
001010 (10)
001011 (11)
001100 (12)
001101 (13)
001110 (14)
001111 (15)
010000 (16)
010001 (17)
010010 (18)
010011 (19)
010100 (20)
010101 (21)
010110 (22)
010111 (23)
011000 (24)
011001 (25)
011010 (26)
Reset
BRESET
BRESET
BRESET
BRESET
SRESET
SRESET
ARESET
ARESET
ARESET
BRESET
BRESET
SRESET
SRESET
–13–
Bit
BCRA0
BCRA1
BCRA2
BCRA3
BCRA4
BCRA5
BCRA6
BCRA7
BCRA8
BCRA9
RxPOWER1
0
0
1
1
Bits RxPOWER0 and RxPOWER1 are used to reduce the ana-
log current consumption of the ADCs. The part is specified in
Power Mode 1. In Power Mode 2, the MCLK needs to be less
than 10 MHz. The performance of the part will then be compa-
rable to the performance in Power Mode 1 except that the ADC
current will now be less than 9.5 mA.
RxON Pin
0
0
1
1
Table V. Baseband Control Register A (BCRA)
Name
MCLKDIV
RxAUTOCAL
RxEXTCAL
RxPOWER0
RxPOWER1
Reserved
RxON
BRESET
Reserved
Reserved
Table VII. Receive Section Activation
Table VI. Power Modes for the ADCs
RxPOWER0
0
1
0
1
RxON Bit
0
1
0
1
Function
MCLK Divider. When this bit is
set to 0, the internal MCLK has
the same value as the external
MCLK. When this bit equals 1,
the external MCLK is divided by
2 within the AD7729 so that the
device operates at half the exter-
nal clock frequency.
Selects AutoCal when set to 1
and UserCal when set to 0.
When set to 1, the Rx calibration
operates in external mode i.e.,
the I and Q analog inputs remain
connected to the pins during the
Rx autocalibration routine.
This bit, in conjunction with
RxPOWER1, is used to reduce
the analog current consumption
of the ADCs.
This bit, in conjunction with
RxPOWER0, is used to reduce
the analog current consumption
of the ADCs.
Power-on for the receive section
of the AD7729.
Baseband Reset.
AIDD1 Reduction
Reserved
1/3 (Power Mode 1)
2/5 (Power Mode 2)
Reserved
Receive Section
OFF
ON
ON
ON
AD7729