AD7492 Analog Devices, AD7492 Datasheet - Page 20

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AD7492

Manufacturer Part Number
AD7492
Description
1MSPS, 4mW Internal Ref & Clk, 12-Bit Parallel ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7492

Resolution (bits)
12bit
# Chan
1
Sample Rate
1MSPS
Interface
Par
Analog Input Type
SE-Uni
Ain Range
Uni 2.5V
Adc Architecture
SAR
Pkg Type
SOIC,SOP

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AD7492
80C186 to AD7492 Interface
Figure 33 shows the AD7492 interfaced to the 80C186
microprocessor. The 80C186 DMA controller provides two
independent high speed DMA channels where data transfer can
occur between memory and I/O spaces. (The AD7492 occupies
one of these I/O spaces.) Each data transfer consumes two bus
cycles, one cycle to fetch data and the other to store data.
After the AD7492 has finished the conversion, the BUSY line
generates a DMA request to Channel 1 (DRQ1). Because of the
interrupt, the processor performs a DMA read operation that
resets the interrupt latch. Sufficient priority must be assigned to
the DMA channel to ensure that the DMA request is serviced
before the completion of the next conversion. This
configuration can be used with 6 MHz and 8 MHz 80C186
processors.
Rev. A | Page 20 of 24
AD0 TO AD15
80C186
A16 TO A19
DRQ1
1
ALE
RD
1
ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 33. 80C186 to AD7492 Interface
ADDRESS/DATA BUS
ADDRESS
ADDRESS
DECODER
Q
LATCH
R
S
ADDRESS
BUS
DATA BUS
CS
BUSY
RD
DB0 TO DB9
(DB11)
OPTIONAL
AD7492
CONVST

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