AD7492 Analog Devices, AD7492 Datasheet - Page 16

• Manufacturer Part Number: AD7492
• Description: 1MSPS, 4mW Internal Ref & Clk, 12-Bit Parallel ADC
• Manufacturer: Analog Devices

Specifications of AD7492

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 1MSPS
• Interface: Par
• Analog Input Type: SE-Uni
• Ain Range: Uni 2.5V
• Adc Architecture: SAR
• Pkg Type: SOIC,SOP

AD7492
V
The V
drivers and the digital input circuitry. It is a separate supply
from AV
for the digital input/output interface is that the user can vary
the output high voltage, V
and V
AV
powered from a 3 V supply. The ADC has better dynamic
performance at 5 V than at 3 V, so operating the part at 5 V,
while still being able to interface to 3 V parts, pushes the
AD7492 to the top bracket of high performance 12-bit ADCs.
Of course, the ADC can have its V
connected together and be powered from a 3 V or 5 V supply.
The trigger levels are V
inputs. The pins that are powered from V
CS , RD , CONVST , and BUSY.
PS/ FS PIN
As previously mentioned, the PS/ FS pin is used to control the
type of power-down mode that the AD7492 can enter into if
operated in Mode 2. This pin can be hardwired either high or
low, or even controlled by another device. It is important to
note that toggling the PS/ FS pin while in power-down mode
does not switch the part between partial sleep and full sleep
modes. To switch from one sleep mode to another, the AD7492
has to be powered up and the polarity of the PS/ FS pin changed.
It can then be powered down to the required sleep mode.
POWER-UP
It is recommended that the user performs a dummy conversion
after power-up, as the first conversion result could be incorrect.
This also ensures that the part is in the correct mode of
operation. The recommended power-up sequence is as follows:
1. GND
2. V
3. V
4. Digital Inputs
5. V
DRIVE
DD
DD
DRIVE
IN
and DV
INL
DRIVE
, from the V
DD
pin is used as the voltage supply to the digital output
and DV
CONVST
DD
BUSY
DBx
are using a 5 V supply, the V
CS
RD
DD
DD
. The purpose of using a separate supply
supply to the AD7492. For example, if
DRIVE
OH
× 0.7 and V
, and the logic input levels, V
t
DRIVE
CONVERT
and DV
DRIVE
DRIVE
× 0.3 for the digital
DRIVE
are DB11 to DB0,
DD
pin can be
pins
Figure 21. Mode 2 Operation
INH
Rev. A | Page 16 of 24
Power vs. Throughput
The two modes of operation for the AD7492 produces different
power vs. throughput performances, Mode 1 and Mode 2; see
the Operating Modes section of the data sheet for more detailed
descriptions of these modes. Mode 2 is the sleep mode
(partial/full) of the part and it achieves the optimum power
performance.
Mode 1
Figure 22 shows the AD7492 conversion sequence in Mode 1
using a throughput rate of 500 kSPS. At 5 V supply, the current
consumption for the part when converting is 3 mA and the
quiescent current is 1.8 mA. The conversion time of 880 ns
contributes 6.6 mW to the overall power dissipation in the
following way:
The contribution to the total power dissipated by the remaining
1.12 μs of the cycle is 5.04 mW
Thus the power dissipated during each cycle is
(880 ns/2 μs) × (5 × 3 mA) = 6.6 mW
(1.12 μs/2 μs) × (5 × 1.8 mA) = 5.04 mW
6.6 mW + 5.04 mW = 11.64 mW
CONVST
BUSY
t
WAKEUP
Figure 22. Mode 1 Power Dissipation
t
CONVERT
880ns
2µs
t
QUIESCENT
1.12µs