AD7938-6 Analog Devices, AD7938-6 Datasheet - Page 18

• Manufacturer Part Number: AD7938-6
• Description: 8-Channel, 625 kSPS, 12-Bit Parallel ADCs with a Sequencer
• Manufacturer: Analog Devices

Specifications of AD7938-6

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 625kSPS
• Interface: Par
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: CSP,QFP

AD7938-6
Figure 22 shows a graph of the THD vs. the analog input
frequency for various supplies while sampling at 625 kHz with
an SCLK of 10 MHz. In this case, the source impedance is 10 Ω.
Figure 22. THD vs. Analog Input Frequency for Various Supply Voltages
–100
–100
–110
–120
Figure 20. THD vs. Source Impedance in Single-Ended Mode
–
–45
–50
–55
–60
–65
–70
–75
–80
–85
–90
–60
–65
–70
–75
–80
–85
–90
–95
–50
–60
–70
–80
–90
Figure 21. THD vs. Source Impedance in Differential Mode
40
10
10
0
F
F
F
RANGE = 0 TO V
IN
IN
SAMPLE
V
DD
= 50kHz
= 50kHz
100
= 3V
= 625kSPS
V
SINGLE-ENDED MODE
V
DIFFERENTIAL MODE
DD
DD
= 3V
= 5V/3V
200
REF
INPUT FREQUENCY (kHz)
100
100
V
SINGLE-ENDED MODE
DD
V
DD
= 5V
R
R
300
SOURCE
SOURCE
= 5V
400
(Ω)
(Ω)
1k
1k
V
V
DD
500
DD
= 3V
= 5V
600
10k
10k
700
Rev. C | Page 18 of 32
ANALOG INPUTS
The AD7938-6 has software-selectable analog input
configurations. The user can choose either eight single-ended
inputs, four fully differential pairs, four pseudo differential
pairs, or seven pseudo differential inputs. The analog input
configuration is chosen by setting the MODE0/MODE1 bits in
the internal control register (see Table 9).
Single-Ended Mode
The AD7938-6 can have eight single-ended analog input
channels by setting the MODE0 and MODE1 bits in the control
register to 0. In applications where the signal source has a high
impedance, it is recommended to buffer the analog input before
applying it to the ADC. An op amp suitable for this function is
the AD8021. The analog input range can be programmed to be
either 0 V to V
If the analog input signal to be sampled is bipolar, the internal
reference of the ADC can be used to externally bias up this
signal to make it the correct format for the ADC.
Figure 23 shows a typical connection diagram when operating
the ADC in single-ended mode. This diagram shows a bipolar
signal of amplitude ±1.25 V being preconditioned before it is
applied to the AD7938-6. In cases where the analog input
amplitude is ±2.5 V, the 3R resistor can be replaced with a
resistor of value R. The resultant voltage on the analog input of
the AD7938-6 is a signal ranging from 0 V to 5 V. In this case,
the 2 × V
Differential Mode
The AD7938-6 can have four fully differential analog input
pairs by setting the MODE0 and MODE1 bits in the control
register to 0 and 1, respectively.
Differential signals have some benefits over single-ended
signals, including noise immunity based on the device’s
common-mode rejection and improvements in distortion
performance. Figure 24 defines the fully differential analog
input of the AD7938-6.
+1.25V
–1.25V
*ADDITIONAL PINS OMITTED FOR CLARITY.
0V
REF
Figure 23. Single-Ended Mode Connection Diagram
mode can be used.
V
REF
IN
or 0 V to 2 × V
3R
R
R
REF
.
+2.5V
0V
V
V
IN0
IN7
Data Sheet
AD7938-6*
V
REFOUT
0.47µF