AD7273 Analog Devices, AD7273 Datasheet - Page 23

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AD7273

Manufacturer Part Number
AD7273
Description
3 MSPS 10-Bit ADC in TSOT and MSOP Packages
Manufacturer
Analog Devices
Datasheet

Specifications of AD7273

Resolution (bits)
10bit
# Chan
1
Sample Rate
3MSPS
Interface
Ser,SPI
Analog Input Type
SE-Uni
Ain Range
(Vref) p-p,Uni (Vref)
Adc Architecture
SAR
Pkg Type
SOP,SOT

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Part Number
Manufacturer
Quantity
Price
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Manufacturer:
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MICROPROCESSOR INTERFACING
AD7273/AD7274 to ADSP-BF53x
The ADSP-BF53x family of DSPs interfaces directly to the
AD7273/AD7274 without requiring glue logic. The SPORT0
Receive Configuration 1 register should be set up as outlined in
Table 8.
1
ADDITIONAL PINS OMITTED FOR CLARITY
AD7273/
AD7274
Figure 39. Interfacing to the ADSP-BF53x
DOUT
SCLK
1
DIN
CS
SPORT0
RCLK0
DR0PRI
RFS0
DT0
ADSP-BF53x
1
Rev. 0 | Page 23 of 28
Table 8. The SPORT0 Receive Configuration 1 Register
(SPORT0_RCR1)
Setting
RCKFE = 1
LRFS = 1
RFSR = 1
IRFS = 1
RLSBIT = 0
RDTYPE = 00
IRCLK = 1
RSPEN = 1
SLEN = 1111
TFSR = RFSR = 1
To implement the power-down modes, set SLEN to 1001 to
issue an 8-bit SCLK burst.
Description
Sample data with falling edge of RSCLK
Active low frame signal
Frame every word
Internal RFS used
Receive MSB first
Zero fill
Internal receive clock
Receive enabled
16-bit data-word (or can be set to 1101 for a
14-bit data-word)
AD7273/AD7274

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