AD7273 Analog Devices, AD7273 Datasheet - Page 20
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AD7273
Manufacturer Part Number
AD7273
Description
3 MSPS 10-Bit ADC in TSOT and MSOP Packages
Manufacturer
Analog Devices
Datasheet
1.AD7273.pdf
(28 pages)
Specifications of AD7273
Resolution (bits)
10bit
# Chan
1
Sample Rate
3MSPS
Interface
Ser,SPI
Analog Input Type
SE-Uni
Ain Range
(Vref) p-p,Uni (Vref)
Adc Architecture
SAR
Pkg Type
SOP,SOT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7273BRMZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD7273/AD7274
POWER VS. THROUGHPUT RATE
Figure 34 shows the power consumption of the device in
normal mode, in which the part is never powered down. By
using the power-down mode of the AD7273/AD7274 when not
performing a conversion, the average power consumption of the
ADC decreases as the throughput rate decreases.
Figure 35 shows that as the throughput rate is reduced, the
device remains in its power-down state longer and the average
power consumption over time drops accordingly. For example,
if the AD7273/AD7274 are operated in continuous sampling
mode with a throughput rate of 200 kSPS and a SCLK of 48 MHz
(V
between conversions, the power consumption is calculated as
follows. The power dissipation during normal operation is
11.6 mW (V
cycle, that is, 333 ns, and the remaining conversion time is
290 ns, the AD7273/AD7274 can be said to dissipate 11.6 mW
for 623 ns during each conversion cycle. If the throughput rate
is 200 kSPS, the cycle time is 5 μs and the average power dissipated
during each cycle is 623/5,000 × 9.6 mW = 1.42 mW. Figure 35
shows the power vs. throughput rate when using the partial
power-down mode between conversions at 3 V. The power-
down mode is intended for use with throughput rates of less
than 600 kSPS, because at higher sampling rates there is no
power saving achieved by using the power-down mode.
DD
= 3 V) and the devices are placed into power-down mode
DD
= 3 V). If the power-up time is one dummy
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7.00
6.60
6.20
5.80
5.40
5.00
4.60
4.20
3.80
3.40
Figure 35. Power vs. Throughput, Partial Power-Down Mode
7.2
6.8
6.4
6.0
5.6
5.2
4.8
4.4
4.0
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
200
0
V
V
DD
Figure 34. Power vs. Throughput, Normal Mode
DD
= 3V
400
= 3V
200
600
800
THROUGHPUT (kSPS)
THROUGHPUT (kSPS)
48MHz SCLK
400
1000
VARIABLE SCLK
1200
600
1400
1600
800
1800
1000
2000