AD7323 Analog Devices, AD7323 Datasheet
AD7323
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AD7323 Summary of contents
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... The ADC contains a 2.5 V internal reference. The AD7323 also allows for external reference operation reference is applied to the REFIN/OUT pin, the AD7323 can accept a true bipolar ±12 V analog input. Minimum ± supplies are required for the ±12 V input range. The ADC has a high speed serial interface that can operate at throughput rates up to 500 kSPS ...
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... Full Shutdown Mode (PM1 = PM0 = 1) ................................. 29 Autoshutdown Mode (PM1 = 1, PM0 = 0) ............................. 30 Autostandby Mode (PM1 = 0, PM0 = 1) ................................ 30 Power vs. Throughput Rate ....................................................... 31 Serial Interface ................................................................................ 32 Microprocessor Interfacing ........................................................... 33 AD7323 to ADSP-21xx .............................................................. 33 AD7323 to ADSP-BF53x ........................................................... 33 Application Hints ........................................................................... 34 Layout and Grounding .............................................................. 34 Power Supply Configuration .................................................... 34 Outline Dimensions ....................................................................... 35 Ordering Guide .......................................................................... 35 Changes to Figure 39 ...................................................................... 20 Changes to Figure 40 and Figure 41 ...
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... Single-ended/pseudo differential mode; ±5 V range Single-ended/pseudo differential mode; ±2.5 V range Single-ended/pseudo differential mode +10 V and ±10 V ranges kHz kHz Figure 100 kHz ripple frequency; see f on unselected channels up to 100 kHz; see 0.1 dB AD7323 Figure 14 ...
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... AD7323 1 Parameter Min DC ACCURACY Resolution 13 No Missing Codes 12-bit plus sign (13 bits) 11-bit plus sign (12 bits) 2 Integral Nonlinearity 2 Differential Nonlinearity Offset Error 2 4 Offset Error Match , 2 4 Gain Error , Gain Error Match Positive Full-Scale Error Positive Full-Scale Error ...
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... Serial Interface See the section Digital inputs = DRIVE Table 6 See See Table 6 Table 6 See ±16 5. DRIVE f = 500 kSPS 16 −16 5. DRIVE f = 250 kSPS 16 −16 5. DRIVE AD7323 section ...
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... AD7323 1 Parameter Min Autoshutdown Mode (Static and I CC DRIVE Full Shutdown Mode and I CC DRIVE POWER DISSIPATION Normal Mode (Operational) Full Shutdown Mode 1 Temperature range is −40°C to +85°C. 2 See the Terminology section. 3 Sample tested during initial release to ensure compliance. ...
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... SIGN DB11 DB10 DB2 t 10 REG MSB SEL2 Figure 2. Serial Interface Timing Diagram Rev Page ≤ 2 3.0 V DRIVE CC REF 1 ) and timed from a voltage level of 1.6 V. DRIVE QUIET DB1 DB0 THREE-STATE DON’T LSB CARE AD7323 ...
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... Reflow ESD 1 If the analog inputs are driven from alternative V Schottky diodes should be placed in series with the AD7323’s V supplies. See the Power Supply Configuration section. 2 Transient currents 100 mA do not cause SCR latch-up. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device ...
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... V Positive Power Supply Voltage. This is the positive supply voltage for the analog input section Analog Supply Voltage, 2 5.25 V. This is the supply voltage for the ADC core on the AD7323. CC This supply should be decoupled to AGND Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface DRIVE operates ...
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... AD7323 TYPICAL PERFORMANCE CHARACTERISTICS 0 4096 POINT FFT V CC – 25°C A INT/EXT 2.5V REFERENCE –40 ±10V RANGE f = 50kHz IN SNR = 77.30dB –60 SINAD = 76.85dB THD = –86.96dB SFDR = –88.22dB –80 –100 –120 –140 0 50 100 150 FREQUENCY (kHz) Figure 4. FFT True Differential Mode ...
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... Figure 14. Channel-to-Channel Isolation 10k 9469 RANGE = ±10V 8k 10k SAMPLES T = 25° 228 303 0 0 –2 – CODE Figure 15. Histogram of Codes, True Differential Mode AD7323 ±5V SE ±2.5V SE ±10V DIFF = 5V 1000 500 ±12V ...
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... AD7323 8k 7600 1201 –3 –2 –1 0 CODE Figure 16. Histogram of Codes, Single-Ended Mode –50 –55 –60 –65 – –75 – –85 DIFFERENTIAL MODE – –95 A –100 0 200 400 600 RIPPLE FREQUENCY (kHz) Figure 17 ...
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... Figure 22. THD vs. Analog Input Frequency for Various Source Impedances, Single-Ended Mode ±10V RANGE R = 4000Ω 2000Ω 1000Ω 100Ω 50Ω IN ±2.5V RANGE R = 4700Ω 3000Ω 1000Ω 100Ω 50Ω IN 1000 Rev Page AD7323 ...
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... N-bit converter with a sine wave input is given by Signal-to-(Noise + Distortion) = (6. 1.76) dB For a 13-bit converter, this is 80.02 dB. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7323 defined as where sixth harmonics ...
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... Figure 14 shows the worst- case across all eight channels for the AD7323. The analog input range is programmed to be the same on all channels. Intermodulation Distortion ...
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... These supplies must be equal to or greater than the largest analog input range selected. See Table 6 for the requirements of these supplies for each analog input range. The AD7323 requires a low voltage 2 5. power the ADC core. Table 6. Reference and Supply Requirements for Each ...
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... The analog inputs of the AD7323 can be configured as single- ended, true differential, or pseudo differential via the control register mode bits (see Table 9). The AD7323 can accept true bipolar input signals. On power-up, the analog inputs operate as four single-ended analog input channels. If true differential or pseudo differential is required, a write to the control register is necessary after power-up to change this configuration ...
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... AD7323, the value of R includes the on resistance of the input multiplexer and is typically 300 Ω. R any extra source impedance on the analog input. The AD7323 enters track mode on the 14 When running the AD7323 at a throughput rate of 1 MSPS with MHz SCLK signal, the ADC has approximately 1 ...
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... The analog inputs on the AD7323 can be configured to operate in single-ended, true differential, or pseudo differential mode. The AD7323 can operate with either an internal or external reference. In Figure 32, the AD7323 is configured to operate with the internal 2.5 V reference. A 680 nF decoupling capacitor is required when operating with the internal reference. The V ...
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... RANGE Figure 38. Common-Mode Range for V Pseudo Differential Inputs The AD7323 can have two pseudo differential pairs or three / pseudo differential inputs referenced to a common V The V + inputs are coupled to the signal source and must have IN an amplitude within the selected range for that channel as programmed in the range register input is applied to the ± ...
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... AD7323 can handle source impedances 5.5 kΩ before the THD starts to degrade. Due to the programmable nature of the analog inputs on the AD7323, the choice of op amp used to drive the inputs is a function of the particular application and depends on the input configuration and the analog input voltage ranges selected. ...
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... These registers are write-only registers. ADDRESSING REGISTERS A serial transfer on the AD7323 consists of 16 SCLK cycles. The three MSBs on the DIN line during the 16 SCLK transfer are decoded to determine which register is addressed. The three Table 8. Decoding Register Select Bits and Write Bit ...
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... Coding This bit is used to select the type of output coding the AD7323 uses for the next conversion result. If coding = 0, the output coding is twos complement. If coding = 1, the output coding is straight binary. When operating in sequence mode, the output coding for each channel is the value written to the coding bit during the last write to the control register ...
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... PM1 PM0 Description 1 1 Full shutdown mode. In this mode, all internal circuitry on the AD7323 is powered down. Information in the control register is retained when the AD7323 is in full shutdown mode Autoshutdown mode. The AD7323 enters autoshutdown on the 15 All internal circuitry is powered down in autoshutdown. ...
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... SEQUENCE REGISTER The sequence register on the AD7323 is a 4-bit, write-only register. Each of the four analog input channels has one corresponding bit in the sequence register. To select a channel for inclusion in the sequence, set the corresponding channel bit the sequence register. RANGE REGISTER The range register is used to select one analog input range per analog input channel ...
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... When the channels for the sequence have been selected, the sequence can be initiated by writing to the control register and setting Seq1 = 0 and Seq2 = 1. The AD7323 continues to convert the selected sequence without interruption provided that the sequence register remains unchanged, and Seq1 = 0 and Seq2 = 1 in the control register ...
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... Bit ADD1 to Bit ADD0 in the control register. In this configuration, there is no need for a write to the sequence register. To operate the AD7323 in this mode, set Seq1 to 1 and Seq2 to 0, and then select the final channel in the sequence by programming Bit ADD1 to Bit ADD0 in the control register. ...
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... The AD7323 is specified for a 2 reference range. When reference is selected, the ranges are ±12 V, ±6 V, ±3 V, and +12 V. For these ranges, the V must be equal to or greater than the maximum analog input range selected (see Table 6) ...
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... NORMAL MODE (PM1 = PM0 = 0) This mode is intended for the fastest throughput rate performance with the AD7323 being fully powered up at all times. Figure 46 shows the general operation of the AD7323 in normal mode. The conversion is initiated on the falling edge and the ...
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... The reference bit in the control register should ensure that the on-chip reference is enabled. This mode is similar to auto- shutdown but allows the AD7323 to power up much faster, which allows faster throughput rates. PART ENTERS SHUTDOWN MODE ...
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... POWER vs. THROUGHPUT RATE The power consumption of the AD7323 varies with throughput rate. The static power consumed by the AD7323 is very low, and significant power savings can be achieved as the throughput rate is reduced. Figure 49 and Figure 50 shows the power vs. throughput rate for the AD7323 tively ...
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... WRITE DIN SEL1 Data is clocked into the AD7323 on the SCLK falling edge. The three MSBs on the DIN line are decoded to select which register is being addressed. The control register is a 12-bit register. If the control register is addressed by the three MSBs, the data on the DIN line is loaded into the control on the 15 edge ...
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... MICROPROCESSOR INTERFACING The serial interface on the AD7323 allows the part to be directly connected to a range of different microprocessors. This section explains how to interface the AD7323 with some common microcontroller and DSP serial interface protocols. AD7323 TO ADSP-21xx The ADSP-21xx family of DSPs interface directly to the AD7323 without requiring glue logic ...
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... All AGND pins on the AD7323 should be connected to the AGND plane. Digital and analog ground pins should be joined in only one place. If the AD7323 system where multiple devices require an AGND and DGND connection, the connection should still be made at only one point ...
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... This board is a complete unit allowing control and communicate with all Analog Devices evaluation boards ending in the CB designators. To order a complete evaluation kit, the particular ADC evaluation board (for example, EVAL-AD7323CBZ), the EVAL-CONTROL BRD2Z, and transformer must be ordered. See the relevant evaluation board data sheet for more information ...
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... AD7323 NOTES ©2006–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05400-0-1/10(A) Rev Page ...