AD9222 Analog Devices, AD9222 Datasheet - Page 39

• Manufacturer Part Number: AD9222
• Description: Octal, 12-Bit, 40/50/65 MSPS Serial LVDS 1.8 V A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9222

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 65MSPS
• Interface: LVDS,Ser
• Analog Input Type: Diff-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

Data Sheet
Power and Ground Recommendations
When connecting power to the AD9222, it is recommended
that two separate 1.8 V supplies be used: one for analog (AVDD)
and one for digital (DRVDD). If only one supply is available, it
should be routed to the AVDD first and then tapped off and
isolated with a ferrite bead or a filter choke preceded by
decoupling capacitors for the DRVDD. The user can employ
several different decoupling capacitors to cover both high and
low frequencies. These should be located close to the point of
entry at the PC board level and close to the parts, with minimal
trace lengths.
A single PC board ground plane should be sufficient when
using the AD9222. With proper decoupling and smart parti-
tioning of the PC board’s analog, digital, and clock sections,
optimum performance can be easily achieved.
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Exposed Paddle Thermal Heat Slug Recommendations
It is required that the exposed paddle on the underside of the
ADC be connected to analog ground (AGND) to achieve the
best electrical and thermal performance of the AD9222. An
exposed continuous copper plane on the PCB should mate to
the
have several vias to achieve the lowest possible resistive thermal
path for heat dissipation to flow through the bottom of the PCB.
These vias should be solder-filled or plugged.
To maximize the coverage and adhesion between the ADC and
PCB, partition the continuous copper plane by overlaying a
silkscreen on the PCB into several uniform sections. This provides
several tie points between the ADC and PCB during the reflow
process, whereas using one continuous plane with no partitions
only guarantees one tie point. See Figure 85 for a PCB layout
example. For detailed information on packaging and the PCB
layout of chip scale packages, see the
A Design and Manufacturing Guide for the Lead Frame Chip
Scale Package (LFCSP).
AD9222
SILKSCREEN PARTITION
exposed paddle, Pin 0. The copper plane should
PIN 1 INDICATOR
Figure 85. Typical PCB Layout
AN-772
Application Note,
AD9222