AD9222 Analog Devices, AD9222 Datasheet - Page 31

• Manufacturer Part Number: AD9222
• Description: Octal, 12-Bit, 40/50/65 MSPS Serial LVDS 1.8 V A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9222

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 65MSPS
• Interface: LVDS,Ser
• Analog Input Type: Diff-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

Data Sheet
CSB Pin
The CSB pin should be tied to AVDD for applications that do
not require SPI mode operation. By tying CSB high, all SCLK
and SDIO information is ignored. This pin is both 1.8 V and
3.3 V tolerant.
RBIAS Pin
To set the internal core bias current of the ADC, place a resistor
(nominally equal to 10.0 kΩ) to ground at the RBIAS pin. The
resistor current is derived on-chip and sets the AVDD current of
the ADC to a nominal 450 mA at 65 MSPS. Therefore, it is
imperative that at least a 1% tolerance on this resistor be used to
achieve consistent performance
Voltage Reference
A stable, accurate 0.5 V voltage reference is built into the
AD9222. This is gained up internally by a factor of 2, setting
V
of 2 V p-p. The V
VREF pin can be driven externally with a 1.0 V reference to
improve accuracy.
When applying the decoupling capacitors to the VREF, REFT,
and REFB pins, use ceramic low-ESR capacitors. These capacitors
should be close to the ADC pins and on the same layer of the
PCB as the AD9222. The recommended capacitor values and
configurations for the
Figure 79.
Table 13. Reference Settings
Selected Mode
External
Internal,
Internal Reference Operation
A comparator within the
SENSE pin and configures the reference. If SENSE is grounded,
the reference amplifier switch is connected to the internal
resistor divider (see Figure 79), setting VREF to 1 V.
Reference
2 V p-p FSR
REF
to 1.0 V, which results in a full-scale differential input span
SENSE Voltage
AVDD
AGND to 0.2 V
REF
is set internally by default; however, the
AD9222
AD9222
reference pin are shown in
Resulting VREF (V)
N/A
1.0
detects the potential at the
Resulting
Differential
Span (V p-p)
2 × external
2.0
reference
Rev. F | Page 31 of 60
The REFT and REFB pins establish their input span of the ADC
core from the reference configuration. The analog input full-
scale range of the ADC equals twice the voltage at the reference
pin for either an internal or an external reference configuration.
If the reference of the
converters to improve gain matching, the loading of the refer-
ence by the other converters must be considered. Figure 81
depicts how the internal reference voltage is affected by loading.
1µF
1
1µF
OPTIONAL.
REFERENCE
1
EXTERNAL
SENSE
0.1µF
VIN + x
VIN – x
SENSE
0.1µF
VIN + x
VIN – x
VREF
VREF
AVDD
1
Figure 79. Internal Reference Configuration
Figure 80. External Reference Operation
AD9222
SELECT
LOGIC
SELECT
LOGIC
is used to drive multiple
CORE
CORE
ADC
ADC
0.5V
0.5V
REFT
REFB
REFT
REFB
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
AD9222
+
+
4.7µF
4.7µF