AD7766 Analog Devices, AD7766 Datasheet - Page 2

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AD7766

Manufacturer Part Number
AD7766
Description
24-Bit, 8.5 mW, 109 dB, 128/64/32 kSPS ADCs
Manufacturer
Analog Devices
Datasheet

Specifications of AD7766

Resolution (bits)
24bit
# Chan
1
Sample Rate
128kSPS
Interface
Ser
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p
Adc Architecture
SAR
Pkg Type
SOP

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AD7766
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Related Devices ................................................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 8
Pin Configuration and Function Descriptions ............................. 9
Typical Performance Characteristics ........................................... 10
Terminology .................................................................................... 14
Theory of Operation ...................................................................... 15
REVISION HISTORY
4/10—Rev. B to Rev. C
Changes to Pin 8 Description ......................................................... 9
Changes to Table 8 .......................................................................... 20
3/09—Rev. A to Rev. B
Changes to t
Changes to Table 7 .......................................................................... 17
1/09—Rev. 0 to Rev. A
Changes to Features Section............................................................ 1
Change to AD7766, Intermodulation Distortion (IMD)
Change to Figure 21 and Figure 24 .............................................. 12
Changes to Supply and Reference Voltages Section ................... 16
Changes to Choosing the SCLK Frequency Section .................. 18
Changes to Driving the AD7766 Section .................................... 20
Changes to Single-Ended Signal Source Section ........................ 20
Changes to Figure 40 and Figure 41 ............................................. 20
Added Table 8; Renumbered Sequentially .................................. 20
Change to Figure 42 ....................................................................... 21
Changes to Antialiasing Section ................................................... 21
Changes to Table 9 .......................................................................... 21
Changes to V
Changes to Figure 46 ...................................................................... 22
8/07—Revision 0: Initial Version
Timing Specifications .................................................................. 5
Timing Diagrams .......................................................................... 6
ESD Caution .................................................................................. 8
AD7766/AD7766-1/AD7766-2 Transfer Function ................ 15
Converter Operation .................................................................. 15
Analog Input Structure .............................................................. 16
Parameter and Integral Nonlinearity Parameter, Table 2 ....... 3
SETTLING
REF+
Input Signal Section ......................................... 22
Parameter, Table 3 .......................................... 5
Rev. C | Page 2 of 24
AD7766/AD7766-1/AD77662-2 Interface .................................. 17
Daisy Chaining ............................................................................... 18
Driving the AD7766/AD7766-1/AD7766-2 ............................... 20
Outline Dimensions ....................................................................... 23
Supply and Reference Voltages ................................................. 16
Initial Power-Up ......................................................................... 17
Reading Data ............................................................................... 17
Power-Down, Reset, and Synchronization ............................. 17
Reading Data in Daisy-Chain Mode ....................................... 18
Choosing the SCLK Frequency ................................................ 18
Daisy-Chain Mode Configuration and Timing Diagrams ... 19
Differential Signal Source ......................................................... 20
Single-Ended Signal Source ...................................................... 20
Antialiasing ................................................................................. 21
Power Dissipation....................................................................... 21
V
Multiplexing Analog Input Channels ...................................... 22
Ordering Guide .......................................................................... 23
REF+
Input Signal ....................................................................... 22

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