SAM3N0B Atmel Corporation, SAM3N0B Datasheet - Page 646

• Manufacturer Part Number: SAM3N0B
• Manufacturer: Atmel Corporation

32.7.11
Name:
Addresses:
Access:
Only the first 16 bits (internal channel counter size) are significant.
• CPRD: Channel Period
If the waveform is left-aligned, then the output waveform period depends on the counter source clock and can be
calculated:
If the waveform is center-aligned, then the output waveform period depends on the counter source clock and can be
calculated:
646
– By using the Master Clock (MCK) divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 128,
– By using a Master Clock divided by one of both DIVA or DIVB divider, the formula becomes, respectively:
– By using the Master Clock (MCK) divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 128,
– By using a Master Clock divided by one of both DIVA or DIVB divider, the formula becomes, respectively:
31
23
15
7
256, 512, or 1024). The resulting period formula will be:
256, 512, or 1024). The resulting period formula will be:
(
------------------------------- -
(
------------------------------------------ -
(
------------------------------------------ -
(
----------------------------------------------------- -
X
CRPD
2
2
SAM3N
×
×
PWM Channel Period Register
×
MCK
CPRD
X
CPRD
MCK
MCK
×
MCK
×
CPRD
DIVA
)
×
DIVA
30
22
14
)
)
PWM_CPRD[0..3]
0x40020208 [0], 0x40020228 [1], 0x40020248 [2], 0x40020268 [3]
6
Read/Write
or
)
(
---------------------------------------------- -
or
CRPD
(
----------------------------------------------------- -
2
MCK
×
×
CPRD
DIVAB
29
21
13
MCK
5
×
)
DIVB
)
28
20
12
4
CPRD
CPRD
CPRD
CPRD
27
19
11
3
26
18
10
2
25
17
9
1
11011A–ATARM–04-Oct-10
24
16
8
0