SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 165
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SAM9263
Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9261.pdf
(248 pages)
5.SAM9263.pdf
(1109 pages)
6.SAM9263.pdf
(51 pages)
Specifications of SAM9263
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- SAM9260 PDF datasheet #3
- SAM9261 PDF datasheet #4
- SAM9263 PDF datasheet #5
- SAM9263 PDF datasheet #6
- Current page: 165 of 284
- Download datasheet (2Mb)
6.15
ARM DDI 0029G
CP
register
status
Single
register
ready
Single
register
not ready
n registers
(n>1)
ready
Coprocessor data transfer from coprocessor to memory
Cycle
1
2
-
1
2
•
b
b+1
1
2
•
n
n+1
Address
pc+8
alu
pc+12
pc+8
pc+8
pc+8
pc+8
alu
pc+12
pc+8
alu
alu+•
alu+•
alu+•
pc+12
The ARM7TDMI processor controls these instructions in the same way as for memory
to coprocessor transfers, with the exception that the nRW line is inverted during the
transfer cycle.
The cycle timings are listed in Table 6-18 where:
•
•
b represents the busy cycles
n represents the number of registers.
MAS
[1:0]
2
2
-
2
2
2
2
2
2
2
2
2
2
Copyright © 1994-2001. All rights reserved.
Table 6-18 coprocessor data transfer instruction cycle operations
nRW
0
1
-
0
0
0
0
1
0
1
1
1
1
Data
(pc+8)
CPdata
-
(pc+8)
-
-
-
CPdata
(pc+8)
CPdata
CPdata
CPdata
CPdata
nMREQ
0
0
-
1
1
1
0
0
0
0
0
0
0
SEQ
0
0
-
0
0
0
0
0
0
1
1
1
0
nOPC
0
1
-
0
1
1
1
1
0
1
1
1
1
Instruction Cycle Timings
nCPI
0
1
-
0
0
0
0
1
0
1
1
1
1
CPA
0
1
-
0
0
0
0
1
0
0
0
0
1
CPB
0
1
-
1
1
1
0
1
0
0
0
0
1
6-23
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