SAM7S64 Atmel Corporation, SAM7S64 Datasheet - Page 759
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SAM7S64
Manufacturer Part Number
SAM7S64
Description
Manufacturer
Atmel Corporation
Specifications of SAM7S64
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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6175L–ATARM–28-Jul-11
Version
6175I
Comments
Overview:
Section
Communication”
Section 7.4 ”Peripheral DMA
Section 9. ”System
Section 9.1.1 ”Brownout Detector and Power-on
Section 12.5.5 ”ID Code
Section 9.5 ”Debug
Rev B to the list.
ADC:
Figure 36-1 ”Analog-to-Digital Converter Block Diagram”
Section 36.6.2 ”ADC Mode
Section 36.5.5 ”Conversion
PMC:
“PMC Interrupt Enable
Register”, LOCKU and UOSCS removed from bit fields in register tables.
Section 25.7 ”Programming
devices having 12 peripheral clocks
Section 25.9.10 ”PMC Master Clock
Section 25.9 ”Power Management Controller (PMC) User
RSTC;
Section 13.3.4.4 ”Software
Electrical Characteristics:
Table 37-2, “DC
Table 37-4, “Brownout Detector
Table 37-19, “External Voltage Reference
Section 37.10.2 ”SSC
Ordering Information:
Table 39-1, “LQFP/QFN Ordering
versions.
Section 40. ”Errata”
Section 40.2 ”Errata Summary by Product and Revision or Manufacturing
Section 40-1 ”Errata Summary
Chip ID noted on products where no chip ID errata exists.
Section 40.16 ”SAM7S64 Errata - Revision B
Section 40.21 ”SAM7S32 Errata - Revision B
USART: XOFF Character Bad Behavior, removed from all revisions of the AT91SAM7S series components.
”Features”,
Characteristics”, CMOS conditions added to I
Controller”,
Unit”, the list;
“Debug Unit (DBGU)”
Characteristics”, added to datasheet.
Register”,
Register”, added “The JTAG ID is used in the IEEE 1149.1 JTAG Boundary Scan.”
Reset”; updated list with details on PERRST and PROCRST.
Register”, updated the formula on bit description:
Triggers”, update to the third paragraph detailing hardware trigger.
Sequence”, Step
Controller”, added list of PDC priorities.
Table”, added to Errata.
Figure 9-1
Characteristics”, V
“PMC Interrupt Disable
“Chip ID
Information”, Updated product ordering information by MRL A and MRL B
Register”, MDIV removed from bit fields in register table.
and
Input”, added ADVREF Input w/conditions “8-bit resolution mode”.
updated with
Registers”, chip IDs updated, added SAM7S32 Rev B and SAM7S64
6 “Enabling Peripheral
Parts”, added to Errata.
Parts”, removed errata for NVM and Voltage Regulator.
Figure 9-2
Reset”, fourth paragraph reduced.
BOT
conditions = Falling edge.
“Mode for General Purpose 2-wire UART Serial
VDDANA replaced by VDDIN. PMC added to figure
Register”,
RTT is reset by “power_on_reset”.
Interface”, added PMC_PCK2 to Register Mapping.
O
for V
“PMC Status
OL
Clocks”, AT91SAM7S512 grouped with
and V
Number”, added to Errata.
OH
“SHTIM: Sample & Hold
.
Register”,
“PMC Interrupt Mask
SAM7S Series
Time”.
Change
Request
Ref
5846
5913
5224
5685
5482
rfo
rfo/5855
5254
5782
5383
5398/5798
5438
5483
5436
5913
5684
5913
rfo
rfo
rfo
rfo
5336
759
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