SAM7S64 Atmel Corporation, SAM7S64 Datasheet - Page 31
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SAM7S64
Manufacturer Part Number
SAM7S64
Description
Manufacturer
Atmel Corporation
Specifications of SAM7S64
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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9.4
6175L–ATARM–28-Jul-11
Advanced Interrupt Controller
Figure 9-4.
• Controls the interrupt lines (nIRQ and nFIQ) of an ARM Processor
• Individually maskable and vectored interrupt sources
• 8-level Priority Controller
• Vectoring
• Protect Mode
• Fast Forcing
• General Interrupt Mask
– Source 0 is reserved for the Fast Interrupt Input (FIQ)
– Source 1 is reserved for system peripherals RTT, PIT, EFC, PMC, DBGU, etc.)
– Other sources control the peripheral interrupts or external interrupts
– Programmable edge-triggered or level-sensitive internal sources
– Programmable positive/negative edge-triggered or high/low level-sensitive external
– Drives the normal interrupt of the processor
– Handles priority of the interrupt sources
– Higher priority interrupts can be served during service of lower priority interrupt
– Optimizes interrupt service routine branch and execution
– One 32-bit vector register per interrupt source
– Interrupt vector register reads the corresponding current interrupt vector
– Easy debugging by preventing automatic operations
– Permits redirecting any interrupt source on the fast interrupt
– Provides processor synchronization on events without triggering an interrupt
sources
Power Management Controller Block Diagram
MAINCK
MAINCK
PLLCK
PLLCK
SLCK
SLCK
PLLCK
Master Clock Controller
Programmable Clock Controller
/1,/2,/4,...,/64
Prescaler
USB Clock Controller
/1,/2,/4,...,/64
ON/OFF
Divider
/1,/2,/4
Prescaler
Processor
Idle Mode
Controller
Clock Controller
Clock
Peripherals
ON/OFF
PCK
int
MCK
periph_clk[2..14]
pck[0..2]
usb_suspend
UDPCK
SAM7S Series
31
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