SAM3U4C Atmel Corporation, SAM3U4C Datasheet - Page 50

• Manufacturer Part Number: SAM3U4C
• Manufacturer: Atmel Corporation

Specifications of SAM3U4C

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 50
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

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12.9
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High Speed Multimedia Card Interface (HSMCI)
USB High Speed Device Port (UDPHS)
SAM3U Series
• Compatibility with MultiMedia Card Specification Version 4.3
• Compatibility with SD Memory Card Specification Version 2.0
• Compatibility with SDIO Specification Version V2.0.
• Compatibility with CE-ATA Specification 1.1
• Cards clock rate up to Master Clock divided by 2
• Boot Operation Mode support
• High Speed mode support
• Embedded power management to slow down clock rate when not used
• HSMCI has one slot supporting
• Support for stream, block and multi-block data read and write
• Supports Connection to DMA controller
• Built in FIFO (32 bytes) with large Memory Aperture Supporting Incremental access
• Support for CE-ATA Completion Signal Disable Command
• USB V2.0 high-speed compliant, 480 MBits per second
• Embedded USB V2.0 UTMI+ high-speed transceiver
• Embedded 4-Kbyte dual-port RAM for endpoints
• Embedded 6 channels DMA controller
• Suspend/Resume logic
• Up to 2 or 3 banks for isochronous and bulk endpoints
• Seven endpoints, configurable by software
• Maximum configuration: seven endpoints:
– One MultiMediaCard bus (up to 30 cards) or
– One SD Memory Card
– One SDIO Card
– Minimizes Processor intervention for large buffer transfers
– Endpoint 0: 64 bytes, 1 bank mode
– Endpoint 1 & 2: 512 bytes, 2 banks mode, HS isochronous capable
– Endpoint 3 & 4:64 bytes, 3 banks mode
– Endpoint 5 & 6: 1024 bytes, 3 banks mode, HS isochronous capable
6430ES–ATARM–22-Aug-11