SAM3N1C Atmel Corporation, SAM3N1C Datasheet - Page 467
SAM3N1C
Manufacturer Part Number
SAM3N1C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N1C
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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28.7
28.7.1
28.7.2
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Functional Description
Transfer Format
Modes of Operation
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must
be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
28-4).
Each transfer begins with a START condition and terminates with a STOP condition (see
28-3).
Figure 28-3.
Figure 28-4. Transfer Format
The TWI has six modes of operations:
These modes are described in the following chapters.
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
• Master transmitter mode
• Master receiver mode
• Multi-master transmitter mode
• Multi-master receiver mode
• Slave transmitter mode
• Slave receiver mode
TWD
TWCK
START and STOP Conditions
Start
Address
TWCK
TWD
R/W
Start
Ack
Data
Ack
Data
Stop
Ack
Stop
SAM3N
SAM3N
Figure
Figure
467
467
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