SAM3N1A Atmel Corporation, SAM3N1A Datasheet - Page 142

• Manufacturer Part Number: SAM3N1A
• Manufacturer: Atmel Corporation

Specifications of SAM3N1A

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.18.5
10.18.5.1
10.18.5.2
10.18.5.3
10.18.5.4
142
ISB
SAM3N
ISB
Syntax
Operation
Condition flags
Examples
; Instruction Synchronisation Barrier
Instruction Synchronization Barrier.
where:
cond
ISB acts as an instruction synchronization barrier. It flushes the pipeline of the processor, so that
all instructions following the ISB are fetched from memory again, after the ISB instruction has
been completed.
This instruction does not change the flags.
ISB{cond}
is an optional condition code, see
“Conditional execution” on page
11011A–ATARM–04-Oct-10
84.