ATxmega64D4 Atmel Corporation, ATxmega64D4 Datasheet - Page 119

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ATxmega64D4

Manufacturer Part Number
ATxmega64D4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64D4

Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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11.15.4
8210B–AVR–04/10
INTFLAGS - Interrupt Flag Register
• Bit 7:2 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 1:0 - INTnIF: Interrupt n Flag
The INTnIF flag is set when a pin change according to the pin's input sense configuration
occurs, and the pin is set as source for port interrupt n. Writing a one to this flag's bit location will
clear the flag. For enabling and executing the interrupt refer to the Interrupt Level description.
The configuration of "VPCTRLA - Virtual Port-map Control Register A" or "VPCTRLB - Virtual
Port-map Control Register B" decides which the flags mapped. When a port is mapped as vir-
tual, accessing this register is identical to accessing the actual INTFLAGS register for the port.
Bit
+0x03
Read/Write
Initial Value
R
7
0
R
6
0
5
R
0
R
4
0
R
3
0
R
2
0
INT1IF
R/W
1
0
XMEGA D
INT0IF
R/W
0
0
INTFLAGS
119

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