ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 12

• Manufacturer Part Number: ATxmega64A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega64A1

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 7-2.
7.4.1
7.4.2
7.4.3
8067M–AVR–09/10
FFFFFF
I/O Memory
SRAM Data Memory
EEPROM Data Memory
5FFF
2000
6000
Data Memory Map (Hexadecimal address)
External Memory
Internal SRAM
(0 to 16 MB)
(16 KB)
All peripherals and modules are addressable through I/O memory locations in the data memory
space. All I/O memory locations can be accessed by the Load (LD/LDS/LDD) and Store
(ST/STS/STD) instructions, transferring data between the 32 general purpose registers in the
CPU and the I/O Memory.
The IN and OUT instructions can address I/O memory locations in the range 0x00 - 0x3F
directly.
I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and
CBI instructions. The value of single bits can be checked by using the SBIS and SBIC instruc-
tions on these registers.
The I/O memory address for all peripherals and modules in XMEGA A1 is shown in the
eral Module Address Map” on page
The XMEGA A1 devices has internal SRAM memory for data storage.
The XMEGA A1 devices have internal EEPROM memory for non-volatile data storage. It is
addressable either in a separate data space or it can be memory mapped into the normal data
memory space. The EEPROM memory supports both byte and page access.
Byte Address
FFFFFF
FFFFFF
10000
3FFF
2000
4000
1FFF
9FFF
1000
2000
FFF
0
58.
External Memory
External Memory
ATxmega384A1
Internal SRAM
Internal SRAM
I/O Registers
(0 to 16 MB)
(0 to 16 MB)
EEPROM
(32 KB)
(8 KB)
(4 KB)
(4 KB)
Byte Address
FFFFFF
FFFFFF
1FFF
5FFF
2FFF
1000
2000
6000
2000
3000
FFF
0
XMEGA A1
External Memory
External Memory
ATxmega256A1
Internal SRAM
Internal SRAM
I/O Registers
(0 to 16 MB)
(0 to 16 MB)
EEPROM
(16 KB)
(4 KB)
(4 KB)
(4 KB)
“Periph-
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