ATtiny88 Automotive Atmel Corporation, ATtiny88 Automotive Datasheet - Page 150
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ATtiny88 Automotive
Manufacturer Part Number
ATtiny88 Automotive
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny88 Automotive
Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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Atmel ATtiny24/44/84 [Preliminary]
Table 18-4.
Notes:
See
selection of offset calibration channels. The MUX0 bit works as a gain selection bit for differen-
tial channels, as shown in
gain is selected, and when it is set (one) 20x gain is selected. For normal differential channel
pairs, the MUX5 bit works as a polarity reversal bit. Toggling of the MUX5 bit reverses the pos-
itive and negative channel orientation.
For offset calibration purposes, the offset of certain differential channels can be measured by
selecting the same input for both negative and positive input. This calibration can be done for
ADC0, ADC3, and ADC7.
detailed manner.
Table 18-5 on page 151
1. See
2.
3. For offset calibration only.See
Reserved for reversal differential channels
“Temperature Measurement” on page 148
Reserved for differential channels
Single Ended Input Channel Selections.
Reserved for offset calibration
Table 18-5 on page 151
Single Ended Input
ADC0 (PA0)
ADC1 (PA1)
ADC2 (PA2)
ADC3 (PA3)
ADC4 (PA4)
ADC5 (PA5)
ADC6 (PA6)
ADC7 (PA7)
0V (AGND)
1.1V (I Ref)
ADC8
“ADC Operation” on page 138
Table 18-5 on page
for details of selection of differential input channels as well as
(2)
for details.
Table 18-5 on page 151
(3)
(1)
(1)
151. When the MUX0 bit is cleared (zero) 1x
describes offset calibration in a more
and
“ADC Operation” on page 138
001000 - 011111
100011 - 100111
101000 - 111111
MUX5..0
000000
000001
000010
000011
000100
000101
000110
000111
100000
100001
100010
7701E–AVR–02/11
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