ATmega644R212 Atmel Corporation, ATmega644R212 Datasheet - Page 58
ATmega644R212
Manufacturer Part Number
ATmega644R212
Description
Manufacturer
Atmel Corporation
Specifications of ATmega644R212
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
4
Eeprom (bytes)
2048
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
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7.2.3.3
8111C–MCU Wireless–09/09
Configuration of non IEEE 802.15.4 Compliant Scenarios
Sniffer
Table 7-9 on page 58
RX_AACK configuration bits, refer to
All frames received are indicated by an IRQ_2 (RX_START) and IRQ_3 (TRX_END). After
frame reception register bit RX_CRC_VALID (register 0x06, PHY_RSSI) is updated with the
result of the FCS check (see
RX_CRC_VALID bit needs to be checked in order to dismiss corrupted frames.
Table 7-9.
This operating mode is similar to the promiscuous mode.
Reception of Reserved Frames
In RX_AACK mode, frames with reserved frame types, refer to
Field (FCF)” on page
etary, non-standard compliant, protocols. It is an extension of the address filtering in RX_AACK
mode. Received frames are either handled similar to data frames, or may be allowed to com-
pletely bypass the address filter.
Table 7-10 on page 58
Figure 7-9 on page 53
Table 7-10.
0x20,0x21
0x22,0x23
Register
Address
Register
Address
...........
0x24,
0x0C
0x2C
0x2E
0x2B
0x17
0x17
0x17
Register
Register
Configuration of a Sniffer Device
RX_AACK Configuration to Receive Reserved Frame Types
Bits
Bits
4
7
5
0
1
4
80, can also be handled. This might be required when implementing propri-
shows the corresponding flow chart.
shows the required configuration for a node to receive reserved frames,
shows an RX_AACK configuration to setup a sniffer device. Other
Register Name
AACK_PROM_MODE
AACK_DIS_ACK
Register Name
SHORT_ADDR_0/1
PAN_ADDR_0/1
IEEE_ADDR_0
........
IEEE_ADDR_7
RX_SAFE_MODE
AACK_UPLD_RES_FT
AACK_FLTR_RES_FT
SLOTTED_OPERATION
Section 8.2 “Frame Check Sequence (FCS)” on page
Table 7-5 on page
Description
1: Enable promiscuous Mode
1: Disable generation of acknowledgment
Description
Set node addresses
0: disable frame protection
1: enable frame protection
1: Enable reserved frame type reception
Filter reserved frame types like data frame type,
see note below
0: disable
1: enable
0: if transceiver works in unslotted mode
1: if transceiver works in slotted mode
54, should be set to their reset values.
Section 8.1.2.2 “Frame Control
AT86RF231
85). The
58
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