ATmega644P Atmel Corporation, ATmega644P Datasheet - Page 152
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ATmega644P
Manufacturer Part Number
ATmega644P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega644P
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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14.10 Timer/Counter Prescaler
14.11 Register Description
14.11.1
8011O–AVR–07/10
TCCR2A – Timer/Counter Control Register A
Figure 14-12. Prescaler for Timer/Counter2
The clock source for Timer/Counter2 is named clk
system I/O clock clk
clocked from the TOSC1 pin. This enables use of Timer/Counter2 as a Real Time Counter
(RTC). When AS2 is set, pins TOSC1 and TOSC2 are disconnected from Port C. A crystal can
then be connected between the TOSC1 and TOSC2 pins to serve as an independent clock
source for Timer/Counter2. The Oscillator is optimized for use with a 32.768 kHz crystal. By set-
ting the EXCLK bit in the ASSR a 32 kHz external clock can be applied. See
Asynchronous Status Register” on page 157
For Timer/Counter2, the possible prescaled selections are: clk
clk
Setting the PSRASY bit in GTCCR resets the prescaler. This allows the user to operate with a
predictable prescaler.
• Bits 7:6 – COM2A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2A pin
must be set in order to enable the output driver.
Bit
(0xB0)
Read/Write
Initial Value
T2S
/128, clk
PSRASY
TOSC1
clk
CS20
CS21
CS22
AS2
I/O
COM2A1
T2S
R/W
7
0
/256, and clk
IO
COM2A0
. By setting the AS2 bit in ASSR, Timer/Counter2 is asynchronously
R/W
6
0
clk
T2S
T2S
COM2B1
/1024. Additionally, clk
R/W
5
0
Clear
COM2B0
R/W
4
0
for details.
TIMER/COUNTER2 CLOCK SOURCE
ATmega164P/324P/644P
T2S
0
. clk
R
3
–
0
10-BIT T/C PRESCALER
T2S
T2S
clk
as well as 0 (stop) may be selected.
T2
is by default connected to the main
R
2
–
0
T2S
WGM21
R/W
/8, clk
1
0
T2S
WGM20
R/W
0
0
/32, clk
”ASSR –
TCCR2A
T2S
/64,
152